Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!rutgers!cbmvax!grr From: grr@cbmvax.cbm.UUCP (George Robbins) Newsgroups: comp.sys.amiga Subject: Re: Some thoughts and questions about the Ranger Message-ID: <1516@cbmvax.cbmvax.cbm.UUCP> Date: Mon, 9-Mar-87 00:18:06 EST Article-I.D.: cbmvax.1516 Posted: Mon Mar 9 00:18:06 1987 Date-Received: Mon, 9-Mar-87 19:31:23 EST References: <140@tahoma.UUCP> <158@rocky.STANFORD.EDU> <1513@cbmvax.cbmvax.cbm.UUCP> <2725@well.UUCP> Reply-To: grr@cbmvax.UUCP (George Robbins) Organization: Commodore Technology, West Chester, PA Lines: 58 Keywords: C64 I really don't want to go on about this for too long, but since it has some bearing on understanding the situation with the transformer, here goes. In article <2725@well.UUCP> ewhac@well.UUCP (Leo 'Bols Ewhac' Schwab) writes: >In article <1513@cbmvax.cbmvax.cbm.UUCP> grr@cbmvax.UUCP (George Robbins) writes: >>It might be possible, however it is often a mistake to assume that the >>predecessor is so that you can emulate it in software >>in real time. The 6502 is still a fast microprocessor, > Really? You think so? The fastest I've ever seen those things >commercially is 2 MHz. The C-64 runs at (slightly less than) 1 MHz. After >moving to the 68K, the very THOUGHT of going back to the 6502 makes me gag. Different processor families require a different number of clock cycles to perform a given unit of work. In the case of a memory cycle, the 6502 needs one clock cycle, the 68000 needs 4. Therefore a 8 MHz 68000 can only access memory twice as fast as a 6502. That you get 16 bits instead of 8 probably won't help any. >>especially when >>munching 8-bit data, and the VIC chip is a pretty tricky little gadget >>by itself. > It's tricky because of all the design barfs made on it. Granted, if >you happen to have a scope and detailed knowledge of hardware, you can make >a bitmapped screen out of sprites with the thing (a friend of mine actually >did this). Ah, but remeber you have to emulate the "bugs" too... > Personally, I'm of the opinion that it should be more than possible >for a 7.14 MHz 68K to emulate a >1 MHz 6502 in software, generally. After >all, the underlying processor architectures and philosophies are similar >(any data movement sets flags, rich addressing schemes, etc.). Work it thru. Assume you can use as much memory as you want, and you can even start at absolute 0. The minimal interpreter overhead for a nop goes something like - mov (pc.reg)+,reg; asl reg,n; jmp interp(reg). Anything else adds cycles. Think of all those expensive addressing modes you'll use just to access the simulated memory space, not to mention the fun of simulating interrupts. > Tacking on the hardware emulation will definitely slow things down, >especially when accessing the VIC chip (should we emulate the 40 microsecond >CPU tromping every eight video lines?). The CIA chips shouldn't be too >troublesome; we've got similar hardware in the Amiga. How we'd do the sound >is anybody's guess. I'll admit you should be able to do reasonably well simulating an Apple ][, with it's nice static display, maybe even get better than 50% performance, but a C64... > Sounds like a major commercial project. Who wants to be first? I think several places have have already tried, but reality has to strike sooner or later... -- George Robbins - now working for, uucp: {ihnp4|seismo|rutgers}!cbmvax!grr but no way officially representing arpa: cbmvax!grr@seismo.css.GOV Commodore, Engineering Department fone: 215-431-9255 (only by moonlite)