Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!utgpu!water!watnot!watmath!clyde!rutgers!husc6!sri-unix!hplabs!cae780!tektronix!uw-beaver!ssc-vax!uvicctr!sbanner1 From: sbanner1@uvicctr.UUCP Newsgroups: comp.sys.ibm.pc Subject: Re: V-20 instruction set Message-ID: <232@uvicctr.UUCP> Date: Mon, 23-Feb-87 14:30:56 EST Article-I.D.: uvicctr.232 Posted: Mon Feb 23 14:30:56 1987 Date-Received: Fri, 27-Feb-87 02:02:25 EST References: <1112@ethos.UUCP> <124@srs.UUCP> Reply-To: sbanner1@uvicctr.UUCP (S. John Banner) Distribution: na Organization: University of Victoria, Victoria B.C. Canada Lines: 24 In article <124@srs.UUCP> dan@srs.UUCP (Dan Kegel) writes: >> I heard that PUSHA, POPA & BOUND were part of the 186/286/NEC >> chips. Does this include the NEC V-20 (or V-20-8)? > >Yes. The V-20,V-30 instruction set looks like a proper superset of the >186 instruction set. If there is interest, I could post a list of the >V-20 native instructions (which include bit field operations) with timings. >- Dan Kegel Yes, please do. Or at least send me a copy direct if there is not enough other interest. Thanks, S. John Banner UUCP ...!{uw-beaver,ubc-vision}!uvicctr!sbanner1 BITNET ccsjb@uvvm ARPA sbanner1@uvunix.UVIC.CDN #1 1121 Fort St. Victoria BC. Canada V8V 3K9