Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Path: utzoo!watmath!clyde!rutgers!brl-adm!adm!Perrine@LOGICON.arpa
From: Perrine@LOGICON.arpa
Newsgroups: comp.unix.wizards
Subject: VAX-11/780 TBIA and 4.2BSD
Message-ID: <4570@brl-adm.ARPA>
Date: Fri, 20-Feb-87 13:36:04 EST
Article-I.D.: brl-adm.4570
Posted: Fri Feb 20 13:36:04 1987
Date-Received: Sat, 21-Feb-87 06:43:40 EST
Sender: news@brl-adm.ARPA
Lines: 29

While investigating the BSD lowcore.s and the VAX Architecture Handbook,
I discovered the following disagreement:

The VAX Architecture Handbook states that when "the location or size of
the system map is change (SBR, SLR) the entire translation buffer must
be cleared by moving 0 into the Translation Buffer Invalidate All
Register (TBIA)." (page 119)

However, in the 4.2BSD lowcore, BSD is apparently trying to clear the
Translation Buffer by moving a 1 into the TBIA register (near line
614).

Which is correct? I *have* found other typos in the Arch. Hbook, so its
a 50/50 guess at this point.

This is important as I am getting ready to turn on memeory management
in our locally-written operating system, and I need to clear the
translation buffer.

Any help would be appreciated.  I am also posting this to INFO-VAX in
case someone with VMS sources can offer assistance.

Tom Perrine
Logicon - Operating Systems Division
San Diego CA
(619) 455-1330 x 725

Perrine@LOGICON.ARPA		(best)
Perrine@DOCKMASTER.ARPA		(alternate)