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From: baum@apple.UUCP
Newsgroups: comp.arch
Subject: Re: 64 Vs 32
Message-ID: <535@apple.UUCP>
Date: Mon, 16-Mar-87 21:10:09 EST
Article-I.D.: apple.535
Posted: Mon Mar 16 21:10:09 1987
Date-Received: Wed, 18-Mar-87 02:20:54 EST
References: <3810013@nucsrl.UUCP> <1308@ucbcad.berkeley.edu>
Reply-To: baum@apple.UUCP (Allen Baum)
Organization: Apple Computer, Inc.
Lines: 24

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[]
>In article <1308@ucbcad.berkeley.edu> faustus@ucbcad.berkeley.edu (Wayne A. Christopher) writes:
>I just read somewhere that the new HP Precision Architecture supports "up
>to 64-bit virtual addresses".  It seems to have a 32-bit internal datapath,
>however.  Can anybody explain what the 64-bit addresses are?
>
>	Wayne

Each memory reference instruction in the Precision architecture has
two or three bits to select a virtual space register. These can be
viewed as a set of eight segment registers, although the 'segments'
don't overlap in a virtual address space; there are 2^32 possible
addresses spaces of 2^32 bytes, so essentially each space has its own
page map.  Aliasing is possible, but dangerous. There are some
shortcuts so that a 32 pointer can be used for some subset of
addresses and space registers (the space register number is taken
from the top 2 bits of the pointer.) There are three architectural
levels with 0, 16, and 32 bit space registers. Details of how the
registers are managed can be found in 'Precision Architecture and
Instruction Reference Manual, manual part number 09740-90014 (Nov.
86).

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