Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!rutgers!ames!ucbcad!ucbvax!decvax!tektronix!tekcrl!vice!keithl From: keithl@vice.TEK.COM (Keith Lofstrom) Newsgroups: comp.arch,comp.lsi Subject: Re: Josephson Junction computers Message-ID: <1492@vice.TEK.COM> Date: Tue, 17-Mar-87 16:21:30 EST Article-I.D.: vice.1492 Posted: Tue Mar 17 16:21:30 1987 Date-Received: Thu, 19-Mar-87 05:16:25 EST References: <8702240351.AA00239@angband.s1.gov> <7718@utzoo.UUCP> <504@cpocd2.UUCP> Organization: Tektronix Inc., Beaverton, Or. Lines: 107 Summary: flux quantization not a short term problem, and, transmission lines ON chip, LONG and detailed Xref: mnetor comp.arch:604 comp.lsi:65 In article <504@cpocd2.UUCP>, howard@cpocd2.UUCP (Howard A. Landman) writes: > > However, the quantization levels depend on the size of the loop, and increase > as the loop gets smaller (remember "particle in a box"?). This is all > freshman physics, but the implication is that the amount of energy required > to store one bit of information goes *UP* as JJ circuits get smaller, and > hence the power consumption goes up, and the power density (power per area) > goes *WAY* up. Hence JJ cicuits will not scale gracefully to smaller sizes. > They are already "quantum limited". The flux quantization in a superconducting loop storage cell IS an issue ( but keep in mind there are many ways to store data). Flux is quantized in packets of 2e-15 Weber, which is 2e-15 tesla-meter2, or .002 tesla-micron2. This says that the voltage in the cell times the switching time in the cell is constant - 2mV will switch the cell in one picosecond, or 200 microvolts for 10 ps switching. Since the flux density goes up as the cell gets smaller, the loop current does go up as the cell gets smaller (I=2e-15Webers/Inductance); a 1 micron loop might have an inductance of 1e-12 henries for a circulating current of 2mA. Thus the power level for a flux-storage cell changing state is perhaps 200 nanowatts when switching in 10ps, 0 the rest of the time. How many memory cells get switched in a clock cycle? In a Von Neumann machine, a pretty small multiple of the word size, if readout is non-destructive. Lets say 100 cells; thats 20 microwatts for the main store. Spacing won't be limited by heat here. It sure is on ECL or GaAs gates. CMOS isn't yet in the speed ballpark, but it will be thermally limited when it does get there. One can store data in latch cells, which can be resistively terminated and aren't constrained by flux quantization (though quantization still shows itself in circuit design). There are some interesting superconducting shift register devices that work sort-of like bubble memories; they will probably be used like disk memory is now. For logic: Plank's constant is 6.6e-34 Joule-sec. That's the energy limit. Thus a 50 Gigahertz clock cycle machine would be able to use 3.3e-23 Joules to switch a gate, and if all this energy were wasted, that would be 1.6 picowatts per gate. A more important energy limit is thermal - the gate energy must be more than a few kT or the circuit will be tripped by occasional thermal quanta (phonons). A good limit would be, say, ~20kT or ~1e-21 Joules at 4K. This makes the gate power a whopping 50 picowatts. IBM switched their gates out to something called the gap voltage, 2mV or so, with on-chip impedances of 10 ohms, requiring 10 microwatts per gate. There are a number of reasons why this is stupid, but what else would you expect from the people who (put your favorite IBM design screw-up here :-) ). The otherwise-wonderful Keyes paper on limits of logic technology used the same silly switch-to-gap assumption, so the idea of 10 microwatt JJ gates has become entrenched. > >Imagine what superconducting transmission lines can do for you here (Note: > >superconducting wires are still dispersive - at a Terahertz or so). > > As I mentioned before, not much. It's easy to get transmission speeds of > .5 to .8 the speed of light using non-superconducting wires. Try teflon > twin-ax driven by ECL, for example, as used in large Amdahl and Fujitsu > machines. Not even superconductors can get > 1.0. You miss the point; speed of light delay is of course a factor of the dielectric, not the conductor. However, those wonderful twin-ax transmission lines don't have the same signal coming out as going in, because of dielectric loss and skin effect on the conductors. The signal is dispersed, and gets slow and ringy. Not an insurmountable problem at 200MHz, but quite a problem at 50 GHz. Superconductors help a lot. The other point is the transmission lines are ON CHIP. Not because superconductors make faster transmission lines, but because JJ circuit impedances are a better match to real-world transmission line impedances. If the permiability of the universe was 10e3 higher, then this would be true of ECL instead. With transmission lines on chip, a designer can do rude and wonderful things like pipelining data in interconnect wires. Imagine a wire running across a die with three successive logic signals propagating down it (?!). Most fast mainframes computers are SSI or MSI, because LSI circuits with 20 milliwatt 40 ps ECL gates are very difficult to cool. Device density for bipolar isn't an insurmountable problem, but busting up your circuit into separate 5 watt chunks is. If the die could be butt-fit and stacked, you could do a heck of a mainframe, often referred to as a "hairy smoking billiard ball". Hairy because of interconnect wires, smoking because of power, and spherical and billiard-ball sized for speed of light delay. With present device power levels replace "smoking" with "incandescent". With JJ replace "smoking" with "gurgling". --- Again, I don't want to claim designing with JJ is cheap, or that the advent of easier-to-cool superconductors will cause silicon IC designers to be sleeping on grates any time soon. Even a room temperature superconducting technology would take vast amounts of design work. However, I suspect that the work will get done, and I would hate to see most of my colleagues too far behind to catch up. JJs are as much of an advance over silicon as silicon is over RELAYS as far as speed/power product goes. An understanding of what the ultimate limits of the technology really are could save us from some rude surprises when we are getting old but not-quite-ready to retire... which is about the time frame I expect JJ to be important in. There are some sampling scope folk around Tek here that were surprised by Hypress, and Sadig Faris gave us a talk two years ago. The next group to be embarassed will be the Spectrum Analyser folk, when the Terahertz mixers start appearing (ever spectrum analysed the infrared from a glass of water?). Then the standards folk. Then the current probe folk. Then the logic analyzer folk. Then... Meanwhile, there's still a buck to be made pushing silicon. Back to work... -- Keith Lofstrom MS 59-316, Tektronix, PO 500, Beaverton OR 97077 (503)-627-4052