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From: chris@mimsy.UUCP
Newsgroups: comp.arch
Subject: Re: Using a DMA chip in strange ways
Message-ID: <5949@mimsy.UUCP>
Date: Tue, 24-Mar-87 23:28:49 EST
Article-I.D.: mimsy.5949
Posted: Tue Mar 24 23:28:49 1987
Date-Received: Thu, 26-Mar-87 03:24:41 EST
References: <4343@columbia.UUCP> <298@attila.weitek.UUCP> <518@gec-mi-at.co.uk> <246@root44.root.co.uk>
Organization: U of Maryland, Dept. of Computer Science, Coll. Pk., MD 20742
Lines: 21

In article <246@root44.root.co.uk> njh@root.co.uk (Nigel Horne) writes:
>When doing a port of UniPlus+ on a machine with a spare channel on it's
>68450 I tried a few benchmarks. I'm afraid (with a 68k at least) it was
>slower using the 68450 than the 68010 (dbra's, moveml's etc.) for memory
>to memory copies. ...

(I assume you mean `movl's; moveml will not run in loop mode.)

>... leave the CPU do to memory copies, it's not worth the hassle.

Well, now, that depends on the machine architecture.  (Must be why
this is in comp.arch :-).)  We have some Heurikon 68010 based boards
that, when the MMU is enabled, suffer a wait state per CPU memory
access.  The DMA chip does not go through the MMU, and copies over
a certain size (we have not yet caculated or measured just *what*
size) will run faster when done via the DMA chip in spite of the
setup overhead.  But as yet we are not worried about this sort of
(small) performance improvement.  McMob needs first an O/S....
-- 
In-Real-Life: Chris Torek, Univ of MD Comp Sci Dept (+1 301 454 7690)
UUCP:	seismo!mimsy!chris	ARPA/CSNet:	chris@mimsy.umd.edu