Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!henry From: henry@utzoo.UUCP (Henry Spencer) Newsgroups: comp.arch Subject: Re: 64 Vs 32 Message-ID: <7863@utzoo.UUCP> Date: Sat, 4-Apr-87 02:15:01 EST Article-I.D.: utzoo.7863 Posted: Sat Apr 4 02:15:01 1987 Date-Received: Sat, 4-Apr-87 02:15:01 EST References: <3810013@nucsrl.UUCP> <985@rpics.RPI.EDU> <2610@phri.UUCP> <528@ima.UUCP> Organization: U of Toronto Zoology Lines: 16 Summary: >32 bit addressing on 32 bit machines > It's already happening. The ROSETTA memory manager chip in the IBM PC RT > manages an address space that is 43 bits... Yes and no, mostly no. The 43-bit (or 40-bit) address is mostly IBM bull. The fact is, the instructions use 32-bit addresses. Not 40, not 43, but 32. The top 4 bits are used to pick out a segment, which after some slightly unusual fiddling ends up determining the physical address. If, repeat if, you can convince the operating system to change segments for you, you can of course access more by changing which segments you have in your address space. IBM claiming that this is 40-bit addressing is utter bilge. By the same standard, most any decent paged machine has INFINITE-bit addresses, since you can get access to arbitrary amounts of data by having the operating system change your page tables suitably. -- "We must choose: the stars or Henry Spencer @ U of Toronto Zoology the dust. Which shall it be?" {allegra,ihnp4,decvax,pyramid}!utzoo!henry