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Path: utzoo!utgpu!water!watnot!watmath!clyde!rutgers!ames!pioneer!lamaster
From: lamaster@pioneer.UUCP
Newsgroups: comp.arch,comp.lang.c
Subject: Re: String Processing Instruction
Message-ID: <978@ames.UUCP>
Date: Wed, 25-Mar-87 19:38:48 EST
Article-I.D.: ames.978
Posted: Wed Mar 25 19:38:48 1987
Date-Received: Fri, 27-Mar-87 04:49:16 EST
References: <15292@amdcad.UUCP>
Sender: usenet@ames.UUCP
Reply-To: lamaster@pioneer.UUCP (Hugh LaMaster)
Distribution: na
Organization: NASA Ames Research Center, Moffett Field, Calif.
Lines: 39
Keywords: instruction set architectures, Am29000
Xref: utgpu comp.arch:662 comp.lang.c:1327

In article <15292@amdcad.UUCP> bcase@amdcad.UUCP (Brian Case) writes:
>There was a discussion a few months ago about processing strings more
>efficiently than a byte at a time.  The Am29000 takes one of the possible
>approaches to improving string processing performance....
>

:

>
>I just thought some of you would be interested.
>
>   bcase

I appreciate seeing submissions like this.  Designing a computer instruction
set is a little like backpacking: There is an art to figuring out exactly
what you really need to take with you. 

My question is this:  How likely is it that a compiler itself will be able to
detect the case when it can use an instruction like this and generate code
automatically to use it.  One of the positive points to the RISC debate is
that it brought out the point that useful instructions which are hard for a
compiler to generate are not always a win.  The old STAR-100 had a number of
instructions, including string processing instructions, which were left out of
the Cyber 205 because it turned out that the compilers never generated them.
They were neat instructions though.  So, my question is, is this instruction
easily usable by a C, Fortran, Pascal, or ADA compiler and if so, under what
conditions?


  Hugh LaMaster, m/s 233-9,  UUCP {seismo,topaz,lll-crg,ucbvax}!
  NASA Ames Research Center                ames!pioneer!lamaster
  Moffett Field, CA 94035    ARPA lamaster@ames-pioneer.arpa
  Phone:  (415)694-6117      ARPA lamaster@pioneer.arc.nasa.gov

"In order to promise genuine progress, the acronym RISC should stand 
for REGULAR (not reduced) instruction set computer." - Wirth

("Any opinions expressed herein are solely the responsibility of the
author and do not represent the opinions of NASA or the U.S. Government")