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From: earl@mips.UUCP
Newsgroups: comp.arch,comp.lang.c
Subject: Re: String Processing Instruction
Message-ID: <985@mips.UUCP>
Date: Sat, 28-Mar-87 20:11:42 EST
Article-I.D.: mips.985
Posted: Sat Mar 28 20:11:42 1987
Date-Received: Sun, 29-Mar-87 17:44:59 EST
References: <15292@amdcad.UUCP> <978@ames.UUCP> <15304@amdcad.UUCP> <238@winchester.mips.UUCP>
Distribution: na
Lines: 18
Keywords: strlen strcmp strcpy
Xref: utgpu comp.arch:700 comp.lang.c:1368
Summary: You've probably got them even if you don't know it

Actually the MIPS architecture does contain string processing
instructions.  They go by the names ADDU and XOR.  For example, the
inner loop of my strlen routine, which searches for a word with a
nonzero byte, is

l1:	lw	t2,1(a1)
	addu	a1,4
	addu	t3,t2,t0
	xor	t3,t2
	and	t3,t1
	beq	t3,t1,l1

Quiz: what are the magic constants that need to be loaded into t0 and
t1 to make this work?

This is 7 cycles per word, or 1.75 cycles per byte.

-Earl