Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!utgpu!water!watnot!watmath!clyde!rutgers!lll-lcc!pyramid!amdahl!bnrmtv!connery From: connery@bnrmtv.UUCP Newsgroups: comp.sys.ibm.pc Subject: IBM PS/2 Micro Channel Message-ID: <1586@bnrmtv.UUCP> Date: Tue, 7-Apr-87 22:45:23 EST Article-I.D.: bnrmtv.1586 Posted: Tue Apr 7 22:45:23 1987 Date-Received: Sat, 11-Apr-87 05:01:43 EST Organization: Bell Northern Research, Mtn. View, CA Lines: 13 I am wondering if there is anyone out there who has read or in some other manner learned more details about the new bus architecture for the new IBM Personal System/2 (boy that's a pain to type) computers. It is claimed that the new architecture allows "parallel DMA". How many? Does this imply dual-ported static RAM? Is that why IBM's memory board can only hold 2M and is so expensive? ...Glenn -- Glenn Connery, Bell Northern Research, Mountain View, CA {hplabs,amdahl,3comvax}!bnrmtv!connery