Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!utgpu!water!watmath!clyde!rutgers!ucla-cs!marc From: marc@ucla-cs.UUCP Newsgroups: comp.arch Subject: Re: Branch prediction in the 532 Message-ID: <5662@shemp.UCLA.EDU> Date: Thu, 23-Apr-87 12:19:08 EST Article-I.D.: shemp.5662 Posted: Thu Apr 23 12:19:08 1987 Date-Received: Sat, 25-Apr-87 05:16:24 EST References: <324@dumbo.UUCP> <165100008@uiucdcsb> Sender: root@CS.UCLA.EDU Reply-To: marc@CS.UCLA.EDU (Marc Tremblay) Organization: UCLA Computer Science Department Lines: 30 In article <165100008@uiucdcsb> robison@uiucdcsb.cs.uiuc.edu writes: > >Are there any good papers on branch prediction? I've seen two schemes: > > 1) Put an extra bit in the instruction indicating which way the branch > will probably go. This is a compile-time prediction. > > 2) Keep a record of past branches, i.e. run-time prediction. > >Though I've heard of examples of machines with each scheme, I've never >seen any studies of their efficiency. > >Arch D. Robison >University of Illinois at Urbana-Champaign > The best paper I have read about branch prediction is: "Branch Prediction Strategies and Branch Target Buffer Design" Johnny K. F. Lee, Hewlett-Packard Alan Jay Smith, UCB. Computer (IEEE), January 1984, pp 6-22. Also you might want to look at the architecture issues concerning the Branch Target Cache of the Am29000, they claim a 60% hit ratio. Enjoy, Marc Tremblay UCLA Computer Science Dept.