Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!rutgers!sri-spam!mordor!styx!ames!pioneer!lamaster From: lamaster@pioneer.arpa (Hugh LaMaster) Newsgroups: comp.arch Subject: Re: Life with TLB and no PT Message-ID: <1366@ames.UUCP> Date: Fri, 24-Apr-87 12:58:57 EST Article-I.D.: ames.1366 Posted: Fri Apr 24 12:58:57 1987 Date-Received: Sat, 25-Apr-87 20:40:03 EST References: <3027@sdcsvax.UCSD.EDU> <338@dumbo.UUCP> Sender: usenet@ames.UUCP Reply-To: lamaster@pioneer.arc.nasa.gov (Hugh LaMaster) Organization: NASA Ames Research Center, Moffett Field, Calif. Lines: 46 In article <338@dumbo.UUCP> hansen@mips.UUCP (Craig Hansen) writes: > >The MIPS R2000 processor already does it, and with a 4k page size, a >64-entry, fully-associative TLB, and 15-19 cycles to refill the TLB in >software from a simple page table, large benchmarks typically spend about 1% >of their execution time in the software TLB refill handler. There are 6-bit : I don't doubt that the MIPS does well running ls, cat, troff, and awk. But what about this Fortran program: real a(1000,1000),b(1000,1000) : : do 10 i=1,1000 do 5 j=1,1000 b(i,j) = a(j,i) 5 continue 10 continue That looks like one TLB load per statement to me. (By the way, this is not a far fetched example at all.) Code references are usually local. Data references are frequently far apart. It seems to me that the R2000 is not designed with numerical analysis in mind. I wish that designers would give more thought to performance on engineering and scientific applications. Even IBM found it necessary to provide for better e&s performance, and such applications are a smaller part of IBM's market than most other companies. If e&s applications are not "typical" ("according to Dhrystone . . ." :-) ) then why does every workstation and mini come with an FPA these days? Hugh LaMaster, m/s 233-9, UUCP {seismo,topaz,lll-crg,ucbvax}! NASA Ames Research Center ames!pioneer!lamaster Moffett Field, CA 94035 ARPA lamaster@ames-pioneer.arpa Phone: (415)694-6117 ARPA lamaster@pioneer.arc.nasa.gov "In order to promise genuine progress, the acronym RISC should stand for REGULAR (not reduced) instruction set computer." - Wirth ("Any opinions expressed herein are solely the responsibility of the author and do not represent the opinions of NASA or the U.S. Government")