Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!utgpu!water!watmath!clyde!rutgers!ames!ucbcad!ucbvax!amdcad!tim From: tim@amdcad.UUCP Newsgroups: comp.arch Subject: Re: AM29000 Booleans Message-ID: <16560@amdcad.AMD.COM> Date: Wed, 6-May-87 12:27:08 EDT Article-I.D.: amdcad.16560 Posted: Wed May 6 12:27:08 1987 Date-Received: Fri, 8-May-87 01:59:19 EDT References: <1270@aw.sei.cmu.edu> Reply-To: tim@amdcad.UUCP (Tim Olson) Organization: Advanced Micro Devices, Inc., Sunnyvale, Ca. Lines: 51 In article <1270@aw.sei.cmu.edu> firth@sei.cmu.edu (Robert Firth) writes: +----- |I've just finished reading about the AM29000 |processor. Naturally, I have lots of questions, |but here's one I'd appreciate a rapid answer to: | | The machine has comparison instructions that | yield a Boolean result in a register. The | processor description says that TRUE is | represented by a 1 in the MOST significant | bit. Is this a typo? +----- No, it is not a typo. One of the restrictions to the Boolean representation is that it had to be a single bit to allow quick determination of the target of a conditional jump. Given this, it could either be placed in the most-significant bit (msb) or the least-significant bit (lsb). The code generated for either of these representations is, in general, equivalent in terms of code space and cycles, except for two cases: the msb representation has the benefit of a quick "jump on negative", while the lsb representation "looks like a C Boolean", i.e. it has the correct value when a Boolean is assigned to a variable. For example, the code sequences that are generated for these cases are: if (x < 0) ..... msb lsb --------------------------- -------------------------- jmpt x_reg,if_failed cplt bool_reg,x_reg,0 jmpf bool_reg,if_failed x = (y < z); msb lsb ---------------------------- -------------------------- cplt bool_reg,y_reg,z_reg cplt x_reg,y_reg,z_reg srl x_reg,bool_reg,31 Since the first code sequence is *much* more prevalent than the second in typical C code, it is better to "optimize" the first sequence at the expense of the second. -- Tim Olson Advanced Micro Devices Processor Strategic Development