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From: am@cl-jenny.UUCP
Newsgroups: comp.arch,comp.lang.c
Subject: Re: String Processing Instruction
Message-ID: <693@jenny.cl.cam.ac.uk>
Date: Wed, 8-Apr-87 05:45:34 EST
Article-I.D.: jenny.693
Posted: Wed Apr  8 05:45:34 1987
Date-Received: Wed, 15-Apr-87 03:17:50 EST
References: <15292@amdcad.UUCP>
Reply-To: am@cl.cam.ac.uk (Alan Mycroft)
Organization: U of Cambridge Comp Lab, UK
Lines: 18
Xref: utgpu comp.arch:859 comp.lang.c:1594

In article <15292@amdcad.UUCP> bcase@amdcad.UUCP (Brian Case) writes:
>One unique feature of the Am29000 architecture is a special instruction....
> ... [ to speed up detecting null bytes in words].
You might be interested to know that such detection of null bytes in words
can be done in 3 or 4 instructions on almost any hardware (nay even in C).
(Code that follows relies on x being a 32 bit unsigned (or 2's complement
int with overflow ignored)...)
   #define has_nullbyte_(x) ((x - 0x01010101) & ~x & 0x80808080)
Then if e is an expression without side effects (e.g. variable)
   has_nullbyte_(e)
is nonzero iff the value of e has a null byte.
(One can view this as explicit programming of the Manchester carry chain
present in many processors which is hidden from the instruction level).

On Acorn's ARM risc machine using this feature as Brian Case suggests speeded
up dhrystone by 20-25%, which may comment on dhrystone or risc. This gives
some 5-6K dhrystones on the slow clocked pre-production 3 micron chips.
(Wonder what state of the art fabrication can give....)