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From: phil@amdcad.UUCP
Newsgroups: comp.arch
Subject: Re: Word vs. Byte Orientation
Message-ID: <16125@amdcad.AMD.COM>
Date: Mon, 13-Apr-87 19:14:48 EST
Article-I.D.: amdcad.16125
Posted: Mon Apr 13 19:14:48 1987
Date-Received: Wed, 15-Apr-87 03:41:52 EST
References: <16122@amdcad.AMD.COM>
Reply-To: phil@amdcad.UUCP (Phil Ngai)
Organization: Advanced Micro Devices, Inc., Sunnyvale, Ca.
Lines: 44

In article <16122@amdcad.AMD.COM> bcase@amdcad.AMD.COM (Brian Case) writes:
>In article <279@winchester.mips.UUCP> mash@winchester.UUCP (John Mashey) writes:
>>2) I/O system design.  This is clearly not true of all systems, but
>>you run into it often enough. IT IS OFTEN EXCEEDINGLY INCONVENIENT
>>TO BE REQUIRED TO FETCH OR STORE A WORD OF A TIME WHEN DEALING WITH
>>DEVICE CONTROLLERS.  [other stuff]
>
>Agreed, but again, why not solve the problem (with an interface chip
>or design approach) instead of propagating it to the processor-memory
>channel?  I have sympathy for OS people:  I was an OS person for just
>a short while.  The choice between dumb system design and creating
>problems for the OS people when they must deal with older chips/boards
>is a tough one (really, because:  the OS is part of the system design
>too).

If we are talking about trying to use existing controllers, such as
(particularly, actually) Unibus controllers, it's likely they jammed
the 16-bit registers one after another and a 32-bit word machine
will find it hard to cope with these controllers.

If we're talking about building new controllers there's no reason why
you couldn't give each register its own word. It uses a little more
address space but only a few bytes more, nothing really.

What the chips do is irrelevant. You can always set the chip decode
logic up (at the board level) to make the chip think word addresses
are byte addresses. 

>>Thus, we have really precise statistics on what's going on, at least on
>>our machines, at the user-level, for anything form typical UNIX programs
>>(like nroff), to large simulators [spice, espresso],
>>parts of the compiler system [assembler, optimizer, debugger],
>>to benchmarks like whetstone, dhrystone, linpack.
>
>Sigh, I wish we could do such simulations.

Brian, there are plenty of faster machines available at AMD and you
ought to consider using them if CPU time is the only constraint.  Or
(hee hee) buy an R2000 to do simulations on. Limiting yourself to your
existing resources is very silly, I think. (I won't post that Brian
does his simulations on an IBM-PC to avoid embarassing him.)

-- 
Phil Ngai, {ucbvax,decwrl,allegra}!amdcad!phil or amdcad!phil@decwrl.dec.com