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From: howard@cpocd2.UUCP
Newsgroups: comp.arch
Subject: Re: unaligned accesses [and words-versus bytes] [long, much data]
Message-ID: <576@cpocd2.UUCP>
Date: Wed, 15-Apr-87 14:52:13 EST
Article-I.D.: cpocd2.576
Posted: Wed Apr 15 14:52:13 1987
Date-Received: Fri, 17-Apr-87 05:44:41 EST
References: <16038@amdcad.AMD.COM> <279@winchester.mips.UUCP>
Reply-To: howard@cpocd2.UUCP (Howard A. Landman)
Organization: Intel Corp. ASIC Services Organization, Chandler AZ
Lines: 27

In article <279@winchester.mips.UUCP> mash@winchester.UUCP (John Mashey) writes:
>First, (Geoff Steckel) <466@alliant.UUCP> posted a pretty good overall
>analysis of the issues, so I won't repeat that, except:
>"Re bus width, byte extraction, unaligned operands, and memory speed:
>  1) Byte extraction from words should be free in time; it'll cost a few gates.
>	Basically this requires one or more cross-couplings in the memory path.
>
>Yup, number 1 turns out to be true: MIPS R2000s pay no noticable cycle-time
>penalty for having load-byte, load-byte unsigned, load-half (signed and
>unsigned), and even load-partial-word (left and right) for dealing with
>unaligned operands).  It take some silicon, but it didn't add to the
>critical path.

I don't wish to dispute John's excellent (and voluminous) analysis, but it
is worth mentioning that Geoff seems to be suffering from the normal logic
designer's misconception that you measure complexity/cost in gates.  On ICs,
gates are extremely cheap and small; it is wires (communication over distance)
that are expensive.  Byte extraction can frequently be performed with the same
circuitry that does shifts, but fast shifters are area-expensive (expansive?)
in 2 dimensions.  You don't want to use them without serious consideration.
Circular shifts are particularly expensive (they can double shifter size), but
fortunately neither byte extraction nor C require them.
-- 
Copyright (c) 1987 by Howard A. Landman.  You may copy this material for
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