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From: mash@mips.UUCP (John Mashey)
Newsgroups: comp.arch
Subject: Re: An idea I'm kicking around
Message-ID: <317@winchester.UUCP>
Date: Sat, 18-Apr-87 23:58:40 EST
Article-I.D.: winchest.317
Posted: Sat Apr 18 23:58:40 1987
Date-Received: Sun, 19-Apr-87 17:48:26 EST
References: <12884@watnot.UUCP>
Reply-To: mash@winchester.UUCP (John Mashey)
Distribution: comp
Organization: MIPS Computer Systems, Sunnyvale, CA
Lines: 16

In article <12884@watnot.UUCP> watmath!watnot!ccplumb (Colin Plumb) writes:
>
>
>  I've been dreaming up A RISCy architecture in my spare time, and in the
>course of trying to minimize the number of memory accesses per instruction,
>I ran into the problem of handling JSR's.  A branch already requires an
>extra fetch to fill the pipeline, and adding a stack push would make things
>ugly.
>
>What if JSR moved the return address into another register?  ....

MIPS R2000's do this.  It works fine.
-- 
-john mashey	DISCLAIMER: <generic disclaimer, I speak for me only, etc>
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