Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!rutgers!ames!necntc!linus!alliant!steckel From: steckel@alliant.UUCP (Geoff Steckel) Newsgroups: comp.arch Subject: Re: Word vs. Byte Orientation (really about nasty hardware) Message-ID: <480@alliant.UUCP> Date: Sat, 18-Apr-87 20:06:21 EST Article-I.D.: alliant.480 Posted: Sat Apr 18 20:06:21 1987 Date-Received: Sun, 19-Apr-87 17:57:52 EST References: <16122@amdcad.AMD.COM> <16125@amdcad.AMD.COM> <305@winchester.mips.UUCP> <16167@amdcad.AMD.COM> <7927@utzoo.UUCP> Reply-To: steckel@alliant.UUCP (Geoff Steckel) Distribution: na Organization: Omnivore Technology, Newton, MA Lines: 14 Keywords: word-addressing Summary: New machines have to work with old boards One point that I believe needs to be emphasized in the word-vs-byte discussion: Many existing and useful boards (VME, Multibus I & (yuck) II, QBUS, etc, etc, not excepting IBMPCbus) cannot be used except by a CPU with bus-level byte addressing. The life cycle cost of redesigning an entire system of peripherals just to be able to use the newest CPU seems very high. If I/O space is separate from memory space, one can kluge some very clumsy fixes, but memory mapped peripherals have problems... Under my OS and I/O hat, I have quite a stock of horror stories about CPUs with this problem. Given the actual cost of CPUs vs peripherals, guess which one got canned when the problems showed up? Hint - we HAD to keep the peripherals. Geoff Steckel (steckel@alliant.uucp, gwes@wjh12.uucp)