Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Path: utzoo!mnetor!seismo!rutgers!ames!ptsfa!well!msudoc!haas
From: haas@msudoc.UUCP (Paul R Haas)
Newsgroups: comp.arch
Subject: Re: Word vs. Byte Orientation
Message-ID: <1360@msudoc.UUCP>
Date: Sat, 18-Apr-87 14:26:09 EST
Article-I.D.: msudoc.1360
Posted: Sat Apr 18 14:26:09 1987
Date-Received: Sun, 19-Apr-87 18:08:33 EST
References: <16122@amdcad.AMD.COM>
Reply-To: haas@msudoc.UUCP (Paul R Haas)
Organization: Michigan State Univ., Engineering, E. Lansing
Lines: 10

In article <16122@amdcad.AMD.COM> bcase@amdcad.AMD.COM (Brian Case) writes:
>Unquestionably there is a code size penalty.  This may or may not be an
>issue given ROM/RAM constaints in some environments.
>
A code size penalty can become a performance penalty, if a loop won't
fit in the cache.  There is also a cost for the time taken to move the
extra code around on various data paths, delaying other users of that
data path (delayed writes, other processors, dma devices, etc...).

- Paul Haas, haas@msudoc.egr.mich-state.edu ...!ihnp4!msudoc!haas