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From: jimb@ogcvax.UUCP
Newsgroups: comp.lsi
Subject: mpla and new mosis rules
Message-ID: <1254@ogcvax.UUCP>
Date: Tue, 21-Apr-87 11:27:39 EST
Article-I.D.: ogcvax.1254
Posted: Tue Apr 21 11:27:39 1987
Date-Received: Fri, 24-Apr-87 00:12:28 EST
Reply-To: jimb@ogcvax.UUCP (Jim Bailey)
Organization: Oregon Graduate Center, Beaverton, OR
Lines: 10

Before I re-invent the wheel, has anyone edited the scalable
cmos templates for mpla to match with the latest mosis technology
file?  As they stand now, several transistors are too near
well contacts.

Thanks for any/all assistance.

Jim Bailey
uucp: {allegra,bellcore,cornell,hp-pcd,sbcs,sequent,tektronix}!ogcvax!jimb
csnet: jimb@Oregon-Grad