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From: jallen@netxcom.UUCP (John Allen)
Newsgroups: comp.os.minix
Subject: Re: EMS spec
Message-ID: <19@netxcom.UUCP>
Date: Fri, 24-Apr-87 15:45:09 EST
Article-I.D.: netxcom.19
Posted: Fri Apr 24 15:45:09 1987
Date-Received: Sun, 26-Apr-87 00:43:55 EST
References: <497@gouldsd.UUCP> <5664@shemp.UCLA.EDU>
Reply-To: jallen@netxcom.UUCP (John Allen)
Lines: 64
Keywords: so how *does* it work ?

In article <5664@shemp.UCLA.EDU> fan@CS.UCLA.EDU (Roy Fan) writes:
>----------
>
>	I am also thinking about creating an EMS ramdisk instead of
>using system ramdisk.  I have the book, but I didn't have the disks
>yet.  If I read the book correctly, I think that in order to implement
>an EMS ramdisk:
>
>(1)	the EMS ramdisk can have a maximum of 1MB since the pointer
>they use is only 16 bits (the segment).  This doesn't seem right
>though, there might be something I miss.

Actually, an EMS board can have 2MB of memory, and there can be four of
them.  Some EMS boards can have 4MB of memory, but look just like two
2MB boards to the driver.

>(2)	you will need an EMS driver that will map the logical memory
>into the 64K physical memory.  For a very simple ramdisk driver, I was
>thinking of mapping the first bank to the beginning of the logical
>memory, and the rest 3 banks after that.  That way, you will have a
>minimum of 48K to transfer.  And if the process requests more than
>48K, you could break them into parts.

If you use all four page registers sequentially, then you could use
DMA to move up to an entire segment from EMS to memory, and vice versa.

>	I have JRAM-3 memory board, and the memory mapping is very
>simple.  I was thinking about doing a direct hardware access without
>going through the EMS driver.  on the JRAM-3, you could map a 64K
>segment anywhere on the 1M physical address.  Thus, I could map 128K
>on D segment and the E segment.  And the mapping is very simple, too.
>All is involved is to POKE a one-byte value into the control address
>(F800:0000 is the default).  MOV    F800:0000, 23H    is all that's
>needed.  (I didn't bother with MOV  AX,F800   MOV DS,AX).

Is this so?  I though that the page registers were accessed through the
I/O addresses: 2[0-F]8 and 2[0-F]9, depending upon switch settings, with
two extra significant address bits (bit 14 and bit 15), providing access
to the four page registers at I/O addresses: 02[x]8, 42[x]8, 82[x]8 and
C2[x]8.  As I understood it, the xxx8 addressed page registers contain the
EMS page number being mapped, and the xxx9 addressed page registers
contain the "page frame", ie: the segment address to which that EMS page
is mapped, so that:

 (With dip switches set to 7)
 if 0x278 contains the value 0x10, and
    0x279 contains the value 0xE000, then
 EMS memory page number 0x10 would be available to the processor at
 addresses E000:0 through E000:3FFF.

>Roy Fan
>University of California    fan@cs.ucla.edu
>Los Angeles

Finally, since the entire F000 segment is reserved for ROM, isn't it
unlikely that any registers would be placed there?  Can anyone out
there clear this up?

John Allen
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