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From: stever@videovax.Tek.COM (Steven E. Rice, P.E.)
Newsgroups: comp.sys.amiga
Subject: Re: The Next Amiga
Message-ID: <4331@videovax.Tek.COM>
Date: Wed, 15-Apr-87 11:28:03 EST
Article-I.D.: videovax.4331
Posted: Wed Apr 15 11:28:03 1987
Date-Received: Sun, 19-Apr-87 05:29:56 EST
References: <3367@udenva.UUCP> <1643@cbmvax.cbmvax.cbm.UUCP> <12821@watnot.UUCP> <1674@cbmvax.cbmvax.cbm.UUCP>
Reply-To: stever@videovax.Tek.COM (Steven E. Rice, P.E.)
Organization: Tektronix Television Systems, Beaverton, Oregon
Lines: 49
Summary: Please -- 32 bits *ALL* the way through!

In article <1674@cbmvax.cbmvax.cbm.UUCP>, George Robbins (grr@cbmvax.UUCP)
writes:

> In article <12821@watnot.UUCP> ccplumb@watnot.UUCP (Colin Plumb) writes:
>> grr@cbmvax.UUCP (George Robbins) writes:
>> 
>> Putting a 68020 in the motherboard lets the chip mem bus be 32 bits wide,
>> and run at 14 (or even 21! *that* would be nice!) MHz, so the processor
>> can do things to it faster.  If the graphics chips can use it as well,
>> we can get things like 8 bitplanes in high-res; if they can't, it wouldn't
>> be too hard to redo the I/O sections to handle the higher bus speed, even
>> if the chips still run at 8 MHz internally.  (I think... please tell me
>> if I'm wrong.  I suspect the 32-bit interface would be harder.)
> 
> It's a lot more practical to leave the chip memory bus alone and run the
> processor out of fast 32-bit memory that runs independent of the chip
> memory.

There would be a tremendous advantage to having the chip memory bus 32 bits
wide -- it would double the memory bandwidth, both for CPU accesses and for
graphics accesses.  It would be necessary to rethink (and probably redesign)
the graphic chips to accept 32-bit data, although a simple cache that saved
the 32-bit word, multiplexors to switch either 16-bit word into the graphic
chips, an address latch, and an address comparator could save half the
memory cycles for reads (memory writes would have to be 16 bits; the
simplest treatment of the cache would be to invalidate it on writes and
write the data directly to memory).

On the other hand, if we could access 32 bits per chip memory cycle, we
could then have twice as many bits per color with the same number of 
memory cycles -- right now, we have 2^5 = 32 colors at once.  With the
same number of accesses (but twice the memory bandwidth), we could have
2^10 = 1024 colors at one time.  Then, if we could cut the memory cycle
time in half, we could double the number of accesses, and go to
1280 x 400 with 1024 colors, or 1280 x 800 with 32 colors (drool, drool,
drool). . .

					Steve Rice

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