Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!rutgers!mit-eddie!genrad!decvax!ucbvax!COGSCI.BERKELEY.EDU!bryce From: bryce@COGSCI.BERKELEY.EDU (Bryce Nesbitt) Newsgroups: comp.sys.amiga Subject: A-500 rumors & comments Message-ID: <8704240432.AA23509@cogsci.berkeley.edu> Date: Thu, 23-Apr-87 23:32:21 EST Article-I.D.: cogsci.8704240432.AA23509 Posted: Thu Apr 23 23:32:21 1987 Date-Received: Sat, 25-Apr-87 13:33:51 EST Sender: daemon@ucbvax.BERKELEY.EDU Lines: 51 Keywords: A-500 autoconfig clocks Rumors have it that the internal slot on the Amiga 500 will be able to accept 512 or so of SLOW FAST memory with no hope of splitting the bus to create FAST FAST memory. What does net-land think about this, and what does Commodore have to say in it's defense? #beginner_mode_on For those who do not know, the Amiga custom chips can be programmed to do operations like line draw and area fill in CHIP memory. Programs can also specify that extra colors are to be available on each video line. Both of these things can use memory slots that would otherwise be available for the processor. This is a ->feature<-. It is also a ->feature<- that (on the Amiga 1000) there is a separate bus that the processor can have all to itself. Memory that attaches here is called FAST memory. #beginner_mode_off The slot on the 500 will have the disadvantage of contention with with the bus used by the custom chips, yet not the advantage of being addressable by them. The real crime is that this memory will ->pretend<- to be FAST, but actually be CHIP, well not really 'cause... The hassles are potentially gigantic. The drop in potential is tragic, particularly for things like CAD that can be calculating in the background while the blitter is off doing it's thing. I feel the descision is unwise. I am aware of the cost related reasons (Hi Jeff!) for the descision. Still, I don't think any of the third party developers want to need to deal with SLOW FAST ram. In decreasing order of expense to produce the base machine I offer the following solutions: 1> Turn this into real FAST memory, buffered and isolated from CHIP memory. 2> Make this CHIP memory and poke a couple of holes in one of the ladies :-) to address it. 3> Since this is an EXPANSION board shuffle the cost of implementing item #1 onto the board. This is probably the best compromise of the three. Another point to consider is that this board will probably be cloned right off, as the internal 256k was. Commodore can make a half-hearted and possibly profitless attempt at the board, and leave it to the cloners to pull up the slack. ---------- One more A-500 comment: A clock chip on the above mentioned board is to be located at $dc00000 absolute with a reader on WB. This is is AGE OF AUTOCONFIG, the DECADE OF 'PLUG AND PLAY'. Cleaner for everybody except the poor sop who gets to design it would be a ROM that copies itself to RAM at config time and gets executed once DOS is up. It can then stay resident (say, for a SCSI driver) or de-allocate itself (our clock). ---------- -Bryce-