Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!rutgers!mit-eddie!genrad!decvax!ucbvax!xls-plexus01!avatar From: avatar@xls-plexus01 (Todd Johnson) Newsgroups: comp.sys.apple Subject: Re: 65802 Message-ID: <8705011753.aa04838@SPARK.BRL.ARPA> Date: Thu, 30-Apr-87 09:00:22 EDT Article-I.D.: SPARK.8705011753.aa04838 Posted: Thu Apr 30 09:00:22 1987 Date-Received: Sun, 3-May-87 06:18:39 EDT Sender: daemon@ucbvax.BERKELEY.EDU Distribution: world Organization: The ARPA Internet Lines: 72 > A friend of mine received a free copy of a book on programming the 68516, as > well as the 65802, 65C02 and of course the 6502. I find that miraculously, > the 65802 is pin compatible with the 6502, therefore, if I understand the > book, can be plugged right in where the 6502 used to be (in my 64K II+). The 65802 is in fact pin compatible with the 6502 and 65C02. You can swap the microprocessor in your //e REPEAT //e with either the 65C02 or the 65802 and your existing software won't notice the difference. The 65C02 has an enhanced instruction set over the 6502 and a few instruction bugs were corrected. It is the chip that Apple sells in their //e enhancement kit. The 65802 has an enhanced instruction set over the 65C02 as well as software selectable 8/16 bit registers. > My questions are 1) is this indeed possible? If you want to put a 65802 (or 65C02) in a ][ or ][+, you may experience a problem because of timing. Several small articles have appeared in Apple Assembly Line (published by S-C Software Corporation, Dallas, TX) which covered the subject of putting the 65C02 and 65802 in "older" apples. Four separate "fixes" have appeared in AAL to correct the timing problem. They are: I - Replace the 74LS257's at motherboard locations B6 and B7 with 74F257's II - Replace the 74LS174's at motherboard locations B5 and B8 with 74F174's III - Replace the ~RAS inputs to the 74LS174's (B5 & B8) on pin 9 with AX. AX comes from the 74LS195 at C2 pin 14. A complete description of this fix is in the Oct 85 issue of AAL. IV - This last fix was described in the Nov 85 issue of AAL in an article by Jim Sather. Jim states that if you perform fix III above, you will probably have to change your RAM to 150 nsec. Or, he states, you can replace the 74LS139 at F2 with a 74S139 and keep your existing 200 nsec RAM. I haven't tried any of these fixes on a ][+ myself, but I have tried both the 65C02 and the 65802 in my //e with NO problems. > and 2) what does this buy me? The 65802 has two modes -- Emulation mode and Native mode. When the chip is powered up or reset it will be in emulation mode. It will then work like a 65C02 and its operation will be transparent to existing software. The Stack Register is a full 16 bits wide but the high byte is forced to $01 when in emulation mode. When the 65802 is switched into Native mode (through software), several other features of the chip can be activated (again by software) to give you 8 or 16 bit A, X, and Y registers and also 8 or 16 bit memory. 16 bit memory is handled as two consecutive 8 bit bytes stored in conventional 65xx low byte/high byte order. When in native mode, the stack is not restricted to page $01, but can be set to any address in the 64K range. > Am I then left to program in machine code? assembler (whose?) or is there > any software out there which would use the new chips 16 bit capabilities. > I do a lot of work with floating point arithmetic, so any speedup would be > appreciated. > > Lyman Hurd I don't know of any existing software that takes advantage of the 65802's capabilities. For now, you will have to write your own routines to use the new features. I currently use the S-C Macro Assembler 2.0 to write programs for the 65802. It is capable of assembling code for the 6502, 65C02, 65802, and the 65816. There may be other assemblers that can handle the new chips but I have not used any others. Regards... Todd L. Johnson ARPANET: tjohnson@amc-hq -----