Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!ut-sally!husc6!rutgers!ucla-cs!sdcrdcf!ism780c!tim From: tim@ism780c.UUCP (Tim Smith) Newsgroups: comp.sys.m68k,comp.sys.intel Subject: Re: Re: Re: Recent Motorola ad seen in Byte Message-ID: <6020@ism780c.UUCP> Date: Tue, 21-Apr-87 16:47:40 EST Article-I.D.: ism780c.6020 Posted: Tue Apr 21 16:47:40 1987 Date-Received: Thu, 23-Apr-87 04:41:32 EST References: <930@intsc.UUCP> <1517@ncr-sd.SanDiego.NCR.COM> <932@intsc.UUCP> Reply-To: tim@ism780c.UUCP (Tim Smith) Distribution: comp Organization: Interactive Systems Corp., Santa Monica CA Lines: 24 Xref: mnetor comp.sys.m68k:383 comp.sys.intel:175 In article <932@intsc.UUCP> tomk@intsc.UUCP (Tom Kohrs @fae) writes: < < doing bank selections or overlays. The 286 architecture is considerably < nicer than what was the dominate 16bit mini at the time, the PDP-11. In < 1980 the idea that you could get the cpu power of an 11/70 on a chip with < a cleaner memory management model got a lot of people excited. So how come you guys put the index in the upper 13 bits of a selector and the GDT/LDT bit and the priveledge bits in the low 3 bits? If you had put the index in the low 13 bits, then the LDT/GDT bit, and then the rest, one could have gotten a 29 bit linear address space by setting up non-overlapping 64k segments. This would have eliminated the major complaint that people who program in higher level languages have against the 286. The only reason I can think of is that it saves having to shift the index to get the offset into the GDT/LDT, but my friends who design CPUs and do VLSI, and all that rot, tell me that this is no problem. -- Tim Smith "Hojotoho! Hojotoho! uucp: sdcrdcf!ism780c!tim Heiaha! Heiaha! Delph or GEnie: Mnementh Hojotoho! Heiaha!" Compuserve: 72257,3706