Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!rutgers!ames!ptsfa!ihnp4!alberta!edm!steve From: steve@edm.UUCP (Stephen Samuel) Newsgroups: comp.sys.m68k,comp.sys.intel Subject: Re: small instruction cache (was: Recent Motorola ad seen in Byte) Message-ID: <142@edm.UUCP> Date: Wed, 22-Apr-87 17:25:07 EST Article-I.D.: edm.142 Posted: Wed Apr 22 17:25:07 1987 Date-Received: Sat, 25-Apr-87 19:21:06 EST References: <362@sbcs.UUCP> <1466@ncr-sd.SanDiego.NCR.COM> <580@plx.UUCP> <556@desint.UUCP> Organization: Unexsys Systems Inc., Edmonton,AB. Lines: 14 Keywords: Sieve, 68020 vs. 80386, Cray, CDC 6600, CDC 7600, cache Summary: caches are MUCH better than the INTEL string instructions. Xref: mnetor comp.sys.m68k:402 comp.sys.intel:193 A long time ago (in a galaxy far far away) Intel came out with the 8086. I remember how they claimed that one of it's great advantages was the string instructions it had, (which the 68000 didn't) that was real good for all sorts of things -- including gargage collection. It wasn't until years later that I actually looked at the cycle timings for the 8086 and found that the INTEL string instructions were NO FASTER, and often actually SLOWER (cycle count) than the 68000's DBcc equivalent. This doesn't include the fact that you can unwrap long moves (MOV,MOV...DBcc) for better speed (something you can't do with the INTEL string instructions). Of course, the sieve was one of the big benchmarks that proved the 80x86's strength over the 68k. Well- Now that Motorola has come up with a better result on both fronts, INTEL is crying 'FOUL' and trying to change the front. Times change People don't.