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From: chapman@fornax.uucp (John Chapman)
Newsgroups: comp.sys.m68k,comp.sys.intel
Subject: Re: Re: Re: Recent Motorola ad seen in Byte
Message-ID: <267@fornax.uucp>
Date: Sat, 25-Apr-87 15:13:34 EDT
Article-I.D.: fornax.267
Posted: Sat Apr 25 15:13:34 1987
Date-Received: Sun, 26-Apr-87 23:10:38 EDT
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Organization: School of Computing Science, SFU, Burnaby, B.C. Canada
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>
[ comparison of 11's and 80x8y's ]
> 
> Integer Divides and multiplies (on models that had them) had to use even/odd
> register pairs.  MMU registers were memory mapped (which I would call "wierd".
> Early PDP-11s could not shift more than one bit per instruction.  The 80x86
> instruction set has more serious register limitiations than the variable
> shift count (which is rarely used).  Even worse are its dedicated use of SI,
> DI, and AX for the string instructions.

This is not peculiar to Intel as NSC 32xxx and Dec VAX machines do it 
(probably a lot of others) as well. Each dedicates particular registers
for specific (count, dst., src.) functions in string instructions. It
is the only way to have single instruction string operations that are
interruptible and resumable (which you obviously want) other than
perhaps putting the internal (non user visible) microcode registers
on the stack *every* time an interrupt happens (*yuck*).

.
.
.
 
> Tom Almy
> Tektronix, Inc.
> 
> (If I had a choice, I would still be doing assembly languange programming
> on a PDP-11, with the best intruction set of all time, rather than a 
> 680x0 or 80x86, both of which have more kludges than I would have time
> to talk about.)
Yup.

john chapman

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