Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!rutgers!ames!amdahl!oliveb!intelca!clif From: clif@intelca.UUCP (Clif Purkiser) Newsgroups: comp.arch,comp.sys.nsc.32k,comp.sys.intel,comp.sys.m68k Subject: Re: Re: Question: on-chip or off-chip MMU? Message-ID: <2581@intelca.UUCP> Date: Mon, 27-Apr-87 13:54:36 EDT Article-I.D.: intelca.2581 Posted: Mon Apr 27 13:54:36 1987 Date-Received: Tue, 28-Apr-87 03:34:12 EDT References: <5635@shemp.UCLA.EDU> <122@motsj1.UUCP> Organization: Intel, Santa Clara, Ca. Lines: 78 Xref: mnetor comp.arch:1110 comp.sys.nsc.32k:121 comp.sys.intel:207 comp.sys.m68k:420 > In article <5635@shemp.UCLA.EDU> fan@CS.UCLA.EDU (Roy Fan) writes: > >-------------- > > > > This is my first posting, so if there is any mistake, please > >excuse. > > > > I am doing a project on MMU's, and from reading various uP > >data books, I have several questions: > > > > The Intel iAPX 286 has an on-chip MMU. > > The Motorola 68020 has an off-chip MMU (68851). > > What are the important deciding factors in designing a MMU > >on-chip or off-chip? > > > > > >Roy Fan fan@cs.ucla.edu (Rich's comments start here) > Other factors to be considered in the choice of any MMU scheme: > > One should look at the architecure of the MMU i.e., segmented > only, demand paged only, or a combination thereof. (deleted material) > > One should look at the potential for a particular MMU scheme being > incorporated in future generation of processors. You should look > at the 286 MMU and the 386 MMU. They are not compatible. The MMU > in the 68030 is compatible with the 68851 PMMU chip. Please explain how the 386 MMU is not upwardly compatible with the 80286 MMU. If your statement is correct than it should have taken more than the few man days that it took to get Xenix 286 and RMX 286 (Both OSs used the 286 Protected Mode) working on the very first stepping of the 80386. The 386 MMU is compatible with the 286's MMU. After reading some 68030 articles I was under the impression that the 030 implemented a subset of the 68851, perhaps I am wrong. More importantly, the 68030 MMU is totally incompatible with the MMU architect of some of your bigger customers Sun, Apollo and almost all of the other 68K Unix manufacturers who couldn't wait for Mot to get the of-chip MMU working correctly. Or they didn't want to pay the performance penalty, added wait-states, associated with an off-chip MMU. > ( deleted Additional ramblings about 68xxx ) > -- Rich Goss > Motorola Western Regional Field Applications Engineer for 68000 > Family Responding to Mr Fan's original question. I believe a very important consideration is that an on-chip MMU allows binary compatibility between machines. For instance on the Unix System for the 80386, several ISVs have been shocked to discovered that same binary disk of their application (like a database) would work on 386 systems with radically different hardware. For example 386 Unix machines use a wide variety of buses MultiBus I, MultiBus II, PC AT bus, and proprietary buses. But because the 386 has an on-chip MMU and a well defined file format (COFF) binary compatible has been achieved between different 386-base Unix computers. Contrast this with Unix systems that use processors with off-chip MMUs. If I want to buy an application for a 68020 machine I have to specify which machine I am using Apollo, Masscomp etc. Eventhough all of the machines are running Unix-like OS and use the 68020. The result is that Unix ISVs spend most of their time (and make most of their money) porting applications to different machines, instead of developing new applications or improving the existing ones. -- Clif Purkiser, Intel, Santa Clara, Ca. {pur-ee,hplabs,amd,scgvaxd,dual,idi,omsvax}!intelca!clif These views are my own property. However anyone who wants them can have them for a nominal fee.