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From: grenley@nsc.UUCP
Newsgroups: comp.arch,comp.sys.nsc.32k,comp.sys.intel,comp.sys.m68k
Subject: Re: Question:  on-chip or off-chip MMU?
Message-ID: <4244@nsc.nsc.com>
Date: Mon, 27-Apr-87 20:40:31 EDT
Article-I.D.: nsc.4244
Posted: Mon Apr 27 20:40:31 1987
Date-Received: Wed, 29-Apr-87 01:31:05 EDT
References: <5635@shemp.UCLA.EDU>
Reply-To: grenley@nsc.UUCP (George Grenley)
Organization: National Semiconductor, Sunnyvale
Lines: 46
Xref: utgpu comp.arch:1061 comp.sys.nsc.32k:121 comp.sys.intel:194 comp.sys.m68k:401

In article <5635@shemp.UCLA.EDU> fan@CS.UCLA.EDU (Roy Fan) writes:
>	What are the important deciding factors in designing a MMU
>on-chip or off-chip?
>	Three I can think of:  execution speed, chip space, and
>additional support.
>	Execution Speed:  In general, on-chip MMU is faster than
>off-chip MMU.
>	Chip Space:  Sometimes, there is not enough space for putting
>a MMU on-chip.  Sometimes, a cache is implemented instead of a MMU.
>	Additional Support:  If the MMU is on-chip, then some
>additional instructions might be needed.  If the MMU is off-chip, then
>additional pins might be needed.

Don't forget cost.  If the MMU must be implemented as a separate chip
or chips, it is expensive.  On the other hand, the incremental cost
of silicon, even in 386/68030/32532 class processors, is small in 
comparison to overall system cost. For example, our yield on 532s
does not increase dramatically if the MMU is deleted.

>	Question 1 :  are there any other factors that might affect the
>design of the MMU being on-chip or off-chip?

Biggest factor is: Do you need an MMU?  If the processor is targeted at
general computing applications (read Unix) then MMU is req'd, and it should
be on chip.  If CPU is for control and other embedded applications, skip
the MMU.

>	Question 2 :  if there is enough space on the chip, would
>everybody put the MMU on-chip?

Well, we did.  So did Intel.  Anybody at Mot care to comment?

>	Question 3 :  if there is only enough room for either a cache
>or a MMU, which one will prevail?

I would guess cache.  CPU memory requirements are outrunning the ability
of DRAM to keep up.


Disclaimer: I work for NSC, designing systems based on the '532.  On the
other hand, I used to work for Intel, selling 286s.  The only computer
I spent my own money on is a Macintosh.  YOU figure out where my biases are.

Regards,

George Grenley