Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Path: utzoo!utgpu!water!watmath!clyde!rutgers!ames!ucbcad!ucbvax!sdcsvax!sdcc6!calmasd!jnp
From: jnp@calmasd.UUCP
Newsgroups: sci.electronics
Subject: Re: MOSFET handling
Message-ID: <2220@calmasd.GE.COM>
Date: Fri, 17-Apr-87 16:55:04 EST
Article-I.D.: calmasd.2220
Posted: Fri Apr 17 16:55:04 1987
Date-Received: Sun, 19-Apr-87 02:52:09 EST
References: <6599@allegra.UUCP> <1299@midas.TEK.COM>
Distribution: na
Organization: G.E.- Calma R&D, San Diego, CA
Lines: 24

In article <1299@midas.TEK.COM>, jeffw@midas.TEK.COM (Jeff Winslow) writes:
> In article <6599@allegra.UUCP> mc@allegra.UUCP (Mark Cravatts) writes:
> >I have handled cmos digital chips, ccd chips, along with a variety of
> >small signal(especially sensitive) and power MOSFETS, and I've never blown
> >one out!  Maybe I've been lucky or maybe the precautions I take are valid,
> >but nevertheless what I'm trying to say is that people usually over react
> >to these devices.
> 
> Ah, but how long did they last once they were in circuit? Static damage to
> MOSFETs not only blows devices outright, but also has a tendency to shorten
> the life of correctly operating devices.

I, too, have handled cmos chips - frequently - just taking care to ground
myself momentarily - from time to time.  None of these devices has failed
in-circuit - some have been in use, daily, for over 3 years now.

Most of these precautions apply to an industrial setting - a lab bench
is a MASSIVELY more controlable environment.


-- 
These opinions are solely mine and in no way reflect those of my employer.  
John M. Pantone @ GE/Calma R&D, Data Management Group, San Diego
...{ucbvax|decvax}!sdcsvax!calmasd!jnp          jnp@calmasd.GE.COM