Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Path: utzoo!mnetor!seismo!ll-xn!husc6!endor!reiter
From: reiter@endor.harvard.edu (Ehud Reiter)
Newsgroups: comp.arch
Subject: Software Page Table Machines
Message-ID: <1968@husc6.UUCP>
Date: Tue, 12-May-87 16:52:05 EDT
Article-I.D.: husc6.1968
Posted: Tue May 12 16:52:05 1987
Date-Received: Fri, 15-May-87 02:18:22 EDT
Sender: news@husc6.UUCP
Reply-To: reiter@endor.UUCP (Ehud Reiter)
Organization: Aiken Computation Lab Harvard, Cambridge, MA
Lines: 22

Some friends of mine are playing around with memory-mapped databases.
They are interested in finding a machine which supports

1) Software control of the virtual-to-real memory mapping.  That is,
when a TLB miss occurs in the MMU, they want to have their own program fill
in the TLB entry, not depend on a hardwired hardware algorithm.

2) Large address space.  This is less important, but since there are
plenty of databases out there which are larger than 4 GB, they'd
like a machine with 40 (or more) addressing bits.

3) Networking.  This is supposed to be a distributed database, so good
networking is a must!

So if you know of any machine which fits all (or most) of the above
requirements, please let me know.  Note that I'm not sure if this is
going to be a paper study, or if they're actually planning to build something.

Thanks.
					Ehud Reiter
					reiter@harvard	(ARPA,BITNET,UUCP)
					reiter@harvard.harvard.EDU  (new ARPA)