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From: djl@mips.UUCP (Dan Levin)
Newsgroups: comp.arch
Subject: Re: 68851 PMMU and 68030 MMU
Message-ID: <384@winchester.UUCP>
Date: Wed, 13-May-87 03:54:41 EDT
Article-I.D.: winchest.384
Posted: Wed May 13 03:54:41 1987
Date-Received: Sat, 16-May-87 02:09:03 EDT
References: <319@forbrk.UUCP>
Distribution: na
Lines: 34
Summary: How to Handle Mapping the OS

In article <319@forbrk.UUCP>, roy@forbrk.UUCP (Roy Gordon) writes:
> TRANSPARENT TRANSLATION
> 
> We will the TTRs to map RAM and our other board addresses.  Ram starts at
> 0 up to 64 MB, but the other board space begins at 0x2000,0000.  So we will
> use one TTR for kernel ram, and one for the hardware addresses.
> [...]
> (I seem to remember some past discussion on kernel non-locality,
> but don't remember if the effects on overall cache hit rate
> within a Unix environment were reported.)

The UNIX kernel has terrible locality, and combined with its rather 
substantial size these days, that makes for a real problem for TLB's.
If you are not careful, you can wipe out your TLB every time you
take a network input interrupt.  Since you generally don't need to
relocate the kernel, and you probably don't need to page the kernel
in these days of cheap memory, there is little reason to map it through
the TLB.

Note that there are at least three ways to attack this problem.  The AM 29000
allows only for complete disabling of the TLB, with no facility for
selective mapping.  The 68030 allows for two unmapped segments, as discussed
above.  The MIPS R2000 has two unmapped segments of its address space,
one cached and one uncached.  We use the unmapped but cached space for
the kernel, and the unmapped and uncached space for memory mapped I/O. 
Should we ever decide to page a part of the OS, we can simply relink that
part to run in mapped space.  It turns out to be handy to map some kernel
data structures to facilitate copy-on-write,  and for the user structure and
PTE's, so we use part of the mapped kernel address space for those.

-- 
			***dan

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