Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!rutgers!ames!amdcad!amd!intelca!mipos3!cpocd2!howard From: howard@cpocd2.UUCP (Howard A. Landman) Newsgroups: comp.arch Subject: Re: really CISC (was: Japanese 32-bit CPUs ( NEC V70 )) Message-ID: <692@cpocd2.UUCP> Date: Tue, 19-May-87 18:37:57 EDT Article-I.D.: cpocd2.692 Posted: Tue May 19 18:37:57 1987 Date-Received: Sat, 23-May-87 10:10:48 EDT References: <3561@spool.WISC.EDU> <3460001@hpsrla.HP.COM> Reply-To: howard@cpocd2.UUCP (Howard A. Landman) Organization: Intel Corp. ASIC Services Organization, Chandler AZ Lines: 25 In article <3460001@hpsrla.HP.COM> brucek@hpsrla.HP.COM (Bruce Kleinman) writes: >CISC CPUs tend to be, uh, >rather complex. And, therefore, the CPU usually dominates the chip. > >RISC CPUs tend to be rather simple. And, >therefore, the CPU is usually a small portion of the chip. This is approximately true, depending on what you mean by "CPU". However, I find that it is usually far more enlightening to consider the fraction of the chip dedicated to computation/storage versus the fraction dedicated to control. Last time I looked, every CISC microprocessor ever made spent 50% to 75% of the chip area on control, with an average of about 2/3. Usually a big chunk of this is the ucode ROMs. This leaves only 25% to 50% of the chip to do the useful work. It's easy to see this in most chip photos. Look for the datapath and register file, squeezed into one end of the chip. Everything else is control. I don't have numbers for all the RISC processors, but the RISC I spent 6% of its area on control; roughly one-tenth the CISC percentage. And I'm pretty sure MIPS is well under half. Numbers, Craig? Anyone? -- Howard A. Landman ...!intelca!mipos3!cpocd2!howard howard%cpocd2%sc.intel.com@RELAY.CS.NET "You just ask them?"