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Path: utzoo!mnetor!seismo!husc6!think!ames!amdahl!dlb!plx!ed
From: ed@plx.UUCP (Ed Chaban)
Newsgroups: comp.arch,comp.org.usenix
Subject: Re: Benchmarking the 532, 68030, MIPS, 386...at a Usenix!
Message-ID: <638@plx.UUCP>
Date: Thu, 21-May-87 13:44:57 EDT
Article-I.D.: plx.638
Posted: Thu May 21 13:44:57 1987
Date-Received: Sat, 23-May-87 13:01:00 EDT
References: <324@dumbo.UUCP> <809@killer.UUCP> <2417@homxa.UUCP> <4329@nsc.nsc.com>
Organization: Plexus Computers, San Jose, CA.
Lines: 20
Summary: Nelson Benchamark
Xref: mnetor comp.arch:1380 comp.org.usenix:204

In article <4329@nsc.nsc.com>, grenley@nsc.nsc.com (George Grenley) writes:
> A while back I invited other chip manufacturers to join me in a CPU
> horse race.  I'm happy to see this request is generating interest.
> However, I haven't heard much from Mot or Intel.  Are you guys
> listening?  Iknow you're out there...
> 
> >At a distressing number of places the sales creatures in the booth would
> >say things like, "I don't believe we're interested in running any
> >benchmarks today.  Let me show you vi."  Now there are some good reasons
> >for this, but it sure sounded like there was something being hidden.
 
 It seems that Neal Nelson's Benchmark has been getting a *LOT* of
 ink lately.  Most of my observations about RISC and CISC systems
 come from my work with this particular chunk of code.

 Those who have seen it will attest to the almost Fortranlike 
 abuse of GOTOs, but I can't imagine why this should give a CISC
 machine an advantage.

 -ed-