Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Path: utzoo!utgpu!water!watmath!clyde!rutgers!ucla-cs!ames!ucbcad!ucbvax!sdcsvax!darrell
From: darrell@sdcsvax.UUCP
Newsgroups: comp.os.research
Subject: Re: Life with TLB and no PT
Message-ID: <3106@sdcsvax.UCSD.EDU>
Date: Thu, 7-May-87 15:11:33 EDT
Article-I.D.: sdcsvax.3106
Posted: Thu May  7 15:11:33 1987
Date-Received: Sat, 9-May-87 05:07:29 EDT
Sender: darrell@sdcsvax.UCSD.EDU
Organization: NASA Ames Research Center, Moffett Field, Calif.
Lines: 29
Approved: mod-os@sdcsvax.uucp

In article <3100@sdcsvax.UCSD.EDU> avie@wb1.cs.cmu.edu (Avadis Tevanian) writes:

>
>Now, back to the main point... since Mach treats an MMU as a TLB it becomes
>possible to start doing interesting things.  For example, I just wrote a
>program that sparsely used 256 megabytes of VM and ran it on my MicroVAX
>which has only 6 megabytes of physical memory.  [Try *that* on Unix].  The
>reason this is no problem is that since the VAX page tables are just a cache
>of virtual to physical mappings ... the module that manages the VAX page
>tables simply throws away mappings at will.  In fact, the way we have
>implemented it is to allocate a fixed pool of "page table memory" which is

I don't follow this part.  Are you saying that pages within a segment can be
mapped sparsely?  Doesn't 4.x BSD allow this?  I confess my ignorance here,
but MANY virtual memory operating systems allow this...




  Hugh LaMaster, m/s 233-9,  UUCP {seismo,topaz,lll-crg,ucbvax}!
  NASA Ames Research Center                ames!pioneer!lamaster
  Moffett Field, CA 94035    ARPA lamaster@ames-pioneer.arpa
  Phone:  (415)694-6117      ARPA lamaster@pioneer.arc.nasa.gov

"In order to promise genuine progress, the acronym RISC should stand 
for REGULAR (not reduced) instruction set computer." - Wirth

("Any opinions expressed herein are solely the responsibility of the
author and do not represent the opinions of NASA or the U.S. Government")