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From: junien@prls.UUCP (Junien Labrousse)
Newsgroups: comp.sys.m68k,comp.sys.atari.st,comp.sys.amiga
Subject: Re: the 68070 - has it left hyperspace yet?
Message-ID: <3580@prls.UUCP>
Date: Fri, 8-May-87 16:12:55 EDT
Article-I.D.: prls.3580
Posted: Fri May  8 16:12:55 1987
Date-Received: Sat, 9-May-87 21:31:16 EDT
References: <280@spectrix.UUCP>
Reply-To: junien@prls.UUCP (Junien Labrousse)
Organization: Philips Research Labs, Sunnyvale, California
Lines: 66
Keywords: 68070 MMU DMA RS232 I2C timers
Xref: mnetor comp.sys.m68k:461 comp.sys.atari.st:3324 comp.sys.amiga:4635

In article 3268, Russell Crook writes:
> A long while ago, Electronics had a small item about the 68070 to be
> built by philips or signetics (I think). Recently, a couple of other
> articles in other trade journals have mentioned this chip, which was to be
> a 68000 + unspecified MMU + 1 or 2 serial ports + timer + ... for
> under 25$ U.S.

> I am curious as to:
> Does this beastie really exist yet (sampling or better), and if not,
> any guesses as to timetable?
> Is the cost as low as mentioned?
> Is it pin compatible with existing 68000's?
> Could you drop it in an Atari St or a Commodore amiga and have a MMU available
> What kind of MMU is it?

You're lucky,
I just happened to read your article. I'm one of the 68070's architects. Let me
describe the beast. You can find in one single chip:
      
      - a 68000 CPU : full 32-bit architecture
                      68000 programming model
                      68000 instruction set
                      10 MHz clock speed
                      enhanced bus error handling (68010 like)

      - a MMU :       virtual address translation for 8 or 128 segments
                                  of 2Mb or 128Kb,
                      memory protection (user/super, R-W-E access)
                      allowing dynamic stack allocation
                      transparent when unused
                      adding one wait state when used

      - a DMA :       2 independent channels
                      byte and word transfers
                      up to 3.2 Mbytes/s
                      single cycle or burst mode
                      max block size 128Kb 
                      compatible with 68430 / 68440 / 68450

      - RS232-C :     one independent receive and transmit channel
                      independent baud rates
                      full/half duplex
                      auto echo mode
                      compatible with 2641 / 2661 / 2691

      - timers :      3 16-bit timers
                      match / count / capture mode
                      pulse generator
                      compatible with 68230

      - I2C bus :     two lines serial bus
                      transfer rate up to 100 Kbits/s
                      master / slave mode
                      multimaster build in protocol

  Unfortunatly, there is no way to implement all these functions in a 68000 pin
compatible package. Timers and serial busses need their own interfaces.
It is packaged in an 84-pin PLCC.

  This chip has been designed by Philips and is being sampled with 100% 
functionality. It will be available on the market in the last quarter of this 
year and its price is estimated to be approximately $25 at the end of 88.

  Let me know if you want more information.   

  Junien Labrousse ( junien@prls.UUCP )