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From: adb@homxa.UUCP (A.BERENBAUM)
Newsgroups: comp.arch,comp.sys.nsc.32k
Subject: Re: Branch prediction in the 532
Message-ID: <2417@homxa.UUCP>
Date: Wed, 6-May-87 10:11:47 EDT
Article-I.D.: homxa.2417
Posted: Wed May  6 10:11:47 1987
Date-Received: Sat, 9-May-87 00:57:23 EDT
References: <324@dumbo.UUCP> <809@killer.UUCP>
Organization: AT&T Bell Laboratories, Holmdel
Lines: 27
Summary: prediction bits in branch instructions
Xref: mnetor comp.arch:1198 comp.sys.nsc.32k:131

In article <809@killer.UUCP>, jfh@killer.UUCP (John Haugh) writes:
> [ Stuff ]
> Has anyone bothered to think about adding branch instructions that tell
> the CPU explicitly whether or not they expect to be taken?  For example,
> 
> 	MBLEQ - most of the time branch less or equal
> 	SBLEQ - seldom branch less or equal
> 
> Compilers would be able to pick the instructions they wanted.  (Speaking of
> patents, if this idea is patentable and has not yet been so, anyone but
> Nat-Semi can have it ... :-) :-) so long as I get credit ... :-) :-)
> 
> - John		(jfh@killer.UUCP)

The CRISP Microprocessor has a single flag bit (call it True/False), and four
conditional branch instructions: 
	if True jump, predicted taken
	if True jump, predicted not taken
	if False jump, predicted taken
	if False jump, predicted not taken
I think this covers what you ask for, but I'm sorry, you don't get credit.
There's a paper in the 1987 COMPCON about compiling for CRISP that discusses
how a compiler can exploit the prediction bits (it can do quite well -- we get
correct prediction of nearly 90% as I recall).

	Alan Berenbaum, AT&T-something-or-other
	research!adb