Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!lll-lcc!styx!ames!ptsfa!ihnp4!ihdev!pdg From: pdg@ihdev.ATT.COM (Joe Isuzu) Newsgroups: comp.arch,comp.sys.nsc.32k Subject: Re: Branch prediction in the 532 Message-ID: <1372@ihdev.ATT.COM> Date: Wed, 6-May-87 13:42:46 EDT Article-I.D.: ihdev.1372 Posted: Wed May 6 13:42:46 1987 Date-Received: Sat, 9-May-87 01:08:55 EDT References: <324@dumbo.UUCP> <809@killer.UUCP> Reply-To: pdg@ihdev.UUCP (Joe Isuzu) Organization: American Nasal Amputation Centre Lines: 24 Xref: mnetor comp.arch:1199 comp.sys.nsc.32k:132 In article <809@killer.UUCP> jfh@killer.UUCP (John Haugh) writes: >Craig stated that, like the rest of us, he was raised to believe that >backwards branches make nice branches after while loops and such, and >forward branches make nice branches before if-thens. Has anyone bothered >to think about adding branch instructions that tell the CPU explicitly >whether or not they expect to be taken? For example, > > MBLEQ - most of the time branch less or equal > SBLEQ - seldom branch less or equal The AT&T CRISP processor does this, with instructions like ifFjmpn, ifFjmpy (if false, expect to jump no or yes) ifTjmpn, ifTjmpy (if true, expect to jump no or yes) These take 0 cycles for a correct prediction, and a max of 3 cycles for an incorrect prediction (-1 cycle per instruction between the compare and the branch). For more info, see any of the CRISP articles from IEEE Compcon '87. -- Paul Guthrie ihnp4!ihdev!pdg This Brain left intentionally blank.