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From: dzzr@beta.UUCP
Newsgroups: comp.arch
Subject: Re: chewing up mips with graphics
Message-ID: <6328@beta.UUCP>
Date: Sun, 14-Jun-87 20:33:38 EDT
Article-I.D.: beta.6328
Posted: Sun Jun 14 20:33:38 1987
Date-Received: Mon, 15-Jun-87 05:43:22 EDT
References: <8270@amdahl.amdahl.com> <359@rocky2.UUCP> <6240@steinmetz.steinmetz.UUCP>
Organization: Los Alamos Natl Lab, Los Alamos, N.M.
Lines: 27
Keywords: simulation processors parrallelism MIPS
Summary: Simulation DOES eat MIPS!! Especially when you are doing it in an object oriented AI environment...



Does somebody REALLY think we are going to run out of work before
we run out of MIPS? Fat chance.

My group is developing large-scale discrete event simulations in
KEE (Knowledge Engineering Environment - an AI shell) with lots of
extra LISP code defining events. We are running on Symbolics 36xx machines. 
Unfortunately, we have run the technology into the ground several
times in the last few years (run times growing out of bound).
Luckily, every time we ended up against the wall, technology would
spring to the rescue with some kind of hardware speed-up or
another.

One of our current projects is causing smoke to pour out of a poor
overworked 3600: lots of events (10's of thousands in a run) PLUS
lots of graphics. Just when things were beginning to look bleak
(again) along will come relief Real Soon Now in the form of faster
hardware. Symbolics announced a new product called the Ivory
LISP-on-a-chip architecture with potential speed increases of
3-5X. Texas Instruments has announced a similar VLSI
LISP-on-a-chip product. In another hardware arena the SUN4 RISC
machine sounds promising.

We already have plans for all of these new, faster machines!

--Doug