Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!utgpu!water!watmath!clyde!rutgers!sri-spam!ames!ucbcad!ucbvax!decvax!tektronix!tekcrl!tekfdi!videovax!stever From: stever@videovax.UUCP Newsgroups: comp.sys.amiga Subject: Re: 68020 Board Wanted Message-ID: <4439@videovax.Tek.COM> Date: Wed, 10-Jun-87 12:38:12 EDT Article-I.D.: videovax.4439 Posted: Wed Jun 10 12:38:12 1987 Date-Received: Sat, 13-Jun-87 06:44:09 EDT References: <8706100022.AA07667@cory.Berkeley.EDU> Reply-To: stever@videovax.Tek.COM (Steven E. Rice, P.E.) Organization: Tektronix Television Systems, Beaverton, Oregon Lines: 104 Summary: Don't trust the magazine article!! In article <8706100022.AA07667@cory.Berkeley.EDU>, Matt Dillon (dillon@CORY.BERKELEY.EDU) quotes an article describing how to substitute a 68020 for a 68000 or 68010: > . . . > 68010 68020 > socket processor > . . . > SIZ1 (Note A) > SIZ0 (Note A) > A0 (Note A) > ^DS (Note A) > ^AS (Note B) > ^RMC (Note B) > > > NOTE A: > A0 and ^DS on the 68020 side are OR'd together to create ^UDS on > the 68010 side > > SIZ1, SIZ0, and A0 go into a three input NAND gate with SIZ1 and A0 > inverted beforehand. The output of the NAND gate becomes the input > to another OR gate. The other input to this OR gate is ^DS (all this > on the 68020 side). The OUTPUT of the OR gate is the ^LDS signal on > the 68010 side. This encoding for ^LDS will fail in many strange and wonderful ways! To appreciate the full potential for disaster, get a copy of the _MC68020 32-Bit Microprocessor User's Manual_ from Motorola, and look at Table 5-3, entitled "MC68020 Internal to External Data Bus Multiplexor" (found on page 5-5 of the second edition). What is required is a circuit that matches the description: ^LDS will be low when ^DS is low and either (1) A0 is high, or (2) the access is not a byte access. In gates, SIZ0 becomes one input of a two-input NAND gate. Invert SIZ1 and it becomes the other input of the two-input NAND. The output of the NAND gate will be low for a byte access (SIZ1 = 0; SIZ0 = 1) and high for all other accesses. Let's call the output ^BYTE ("not byte"). Take ^BYTE and A0 into the inputs of a two-input NOR gate. The output of the NOR gate will be low when either ^BYTE is high or A0 is high. We'll call this output ^LOWER. Take ^LOWER and ^DS into the inputs of a two-input OR gate. The output is ^LDS. This will work for all cases, including 3-byte accesses (No, I'm not kidding! What do you think happens when you do a long-word access to an odd boundary? No, it doesn't take an address exception! Look it up!!). Of course, all of this can be done in a PAL. However you do it, be sure that propagation delays don't cause ^UDS and ^LDS (particularly ^LDS) to come out too late in the cycle. > NOTE B: > ^AS and ^RMC are OR'd together to create ^AS on the 68010 side First of all, this won't work! ^RMC is high except during Read-Modify- Write cycles, so the output of the OR gate would _never_ go low (the processor wouldn't get past the initial Reset vector load). If ^AS and ^RMC were AND-ed together, it might seem to be working, but it wouldn't be a good idea! Unlike the 68000 and 68010, when the 68020 runs Read-Modify-Write cycles, it actually is performing several distinct bus accesses. Holding ^AS down during the time when addresses are changing could be hazardous to your mental health!!! Probably the best way to do this would be to hack an ^RMC line in all over your system [ 8^) ]. Failing that, just ignore ^RMC. The likelihood of another system element (e.g., a DMA device) interfering during the execution of a TAS, CAS, or CAS2 instruction is *far* smaller than the probability of a disaster caused by changing the addresses with ^AS asserted and R/^W low!!! As an aside -- if you are *sure* that it is impossible to initiate a write to *any* memory or other device which you use now or might use in the future, then AND-ing ^AS and ^RMC together may be reasonable. This requires that ^DS be an input everywhere there is a possibility of writing to the part. It also requires that accesses to dynamic RAM can be started by ^DS going low (most designs kick off an access when ^AS goes low). If *all* these conditions are met, it is possible to AND ^AS and ^RMC together. But be *very sure*!!! > (Taken from some obscure magazine article dated June 20, 1985). It deserves to remain obscure! Steve Rice ----------------------------------------------------------------------------- Copyright 1987 by Steven E. Rice, P.E. All Rights Reserved. This material may be redistributed only where such redistribution is without charge and without restrictions on further redistribution. Incorporation of this material in a compilation or other collective work constitutes permission from the intermediary to all recipients to freely redistribute the entire collection. All other uses are prohibited. ----------------------------------------------------------------------------- new: stever@videovax.tv.Tek.com old: {decvax | hplabs | ihnp4 | uw-beaver | cae780}!tektronix!videovax!stever