Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!rutgers!mit-eddie!bu-cs!m2c!spdcc!dyer From: dyer@spdcc.COM (Steve Dyer) Newsgroups: comp.unix.xenix,comp.sys.intel,comp.sys.ibm.pc Subject: Re: XENIX 386 benchmark results Message-ID: <139@spdcc.COM> Date: Thu, 2-Jul-87 21:45:36 EDT Article-I.D.: spdcc.139 Posted: Thu Jul 2 21:45:36 1987 Date-Received: Sat, 4-Jul-87 08:56:09 EDT References: <127@spdcc.COM> <225@m10ux.UUCP> Organization: S.P. Dyer Computer Consulting, Cambridge MA Lines: 41 Xref: mnetor comp.unix.xenix:432 comp.sys.intel:284 comp.sys.ibm.pc:5273 In article <225@m10ux.UUCP>, braun@m10ux.UUCP writes: > After seeing the various benchmarks for 80286, 80386, and 68020's, > I have been wondering: What sizes are the integers used by each machine? > I assume that a 80[012]86 is using 16 bit integers. I would also suspect > taht a 68020 is benchmarked with 32 bit ints, since that's what you get > from Sun and the other 68020 workstation makers. What about the 80386? > Are most of these benchmarks done running the same binary on a '386 as > used on the '286? If so, what happens to the '386's speed when it runs > with 32 bit integers? At least for "dhrystone", all integers are declared as "int", meaning that the compiler chooses the natural size for its target architecture. For XENIX 286 cc, int == 16 bits and for XENIX 386 cc, int == 32 bits. Maybe my report wasn't clear enough (I thought it was), but I reported results for both 286 objects and 386 objects running on the Intel 386 as well as baseline results for the 286 objects running on an 8mhz 286. > By the way, what support does the '386 have for 32 bit arithmetic > and 32 bit addressing? Is it a new bunch of instructions, or > a different mode for the cpu? This is interesting. First, both the 286 and 386 execute the same instructions (the 386 has some extensions and new addressing modes, but this is generally a true statement) but on the 386, the operand size can vary. The 386's registers are analogous to the 8086, but the "general registers" (if they can be called that) are potentially 32 bits wide. In real mode (and virtual-86 mode) the operand and address sizes are 16 bits by default, just like an 8086 or 286. In protected mode, the address and operand sizes are determined by the D-bit in the segment descriptor for the code currently executing. If D==0, then 16-bit addressing and operands are the default; if D==1, then all addresses and operands are taken to be 32 bits wide. There are two opcode prefixes which invert the current sizes of addresses and operands for that instruction. These prefixes are most useful in a real mode DOS environment to force 32-bit operations. They're generally unnecessary in a protected mode environment, since the OS sets your code segment selector appropriately. I could imagine some hacks to get 16-bit behavior in a 32-bit environment, but they'd be certainly unusual. -- Steve Dyer dyer@harvard.harvard.edu dyer@spdcc.COM aka {ihnp4,harvard,linus,ima,bbn,m2c}!spdcc!dyer