Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!rochester!cornell!uw-beaver!tektronix!reed!percival!nerd From: nerd@percival.UUCP (Michael Galassi) Newsgroups: comp.sys.m68k Subject: Re: 68000 shift/rotate timings Message-ID: <757@percival.UUCP> Date: Sun, 28-Jun-87 08:48:41 EDT Article-I.D.: percival.757 Posted: Sun Jun 28 08:48:41 1987 Date-Received: Sun, 28-Jun-87 18:35:35 EDT References: <19497@ucbvax.BERKELEY.EDU> Reply-To: nerd@percival.UUCP (Michael Galassi) Distribution: world Organization: Percy's UNIX, Portland, OR. Lines: 26 In article <19497@ucbvax.BERKELEY.EDU> robinson@renoir.Berkeley.EDU (Michael Robinson) writes: >The Signetics S68000 Users Guide (which is just a photo-reduction of >the Motorola manual) shows the cycle timings to shift a word in a register >as 6+2n (where n is the number of bits to shift), but gives the cycle >timing to shift a word in memory as 8 plus effective address overhead. >Is this a misprint? If not, why is the time to shift a register a >function of n, but the time to shift memory a constant? There are three forms of the shift operation (logical or arithmetic alike), ASn Dx,Dy | LSn Dx,Dy ASn #x,Dy | LSn #x,Dy ASn | LSn The last form will only shift one bit at a time therefore the only uncertainty is how long it will figure out what realy means (i.e. (a0) will be faster than 6(a0,d1)). The first two forms the shift can do multiple bits in one instruction but the hardware can only shift one bit on every other clock so we get to wait around for this. The rotate instructions work the same way. -michael -- If my employer knew my opinions he would probably look for another engineer. Michael Galassi, Frye Electronics, Tigard, OR ..!{decvax,ucbvax,ihnp4,seismo}!tektronix!reed!percival!nerd