Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!husc6!necntc!mit-eddie!aryeh From: aryeh@eddie.MIT.EDU (Aryeh M. Weiss) Newsgroups: comp.unix.xenix Subject: Re: Need help w/Apparat Ram Card with Microport 2.2 Message-ID: <6143@eddie.MIT.EDU> Date: Sun, 21-Jun-87 08:54:06 EDT Article-I.D.: eddie.6143 Posted: Sun Jun 21 08:54:06 1987 Date-Received: Mon, 22-Jun-87 06:42:29 EDT References: <114@qetzal.UUCP> <6120@eddie.MIT.EDU> <117@ddsw1.UUCP> Reply-To: aryeh@eddie.MIT.EDU (Aryeh M. Weiss) Organization: MIT, EE/CS Computer Facilities, Cambridge, MA Lines: 44 Keywords: double fault panic 256k dram 64k dram Summary: Fixes for uport unix 80287 crashes and clock problem In article <117@ddsw1.UUCP> karl@ddsw1.UUCP (Karl Denninger) writes: >In article <6120@eddie.MIT.EDU>, aryeh@eddie.MIT.EDU (Aryeh M. Weiss) writes: >> Also, users of Microport UNIX will be glad to know that the 80287 >> floating point crash (system hangs when there is a floating point >> error) has been fixed, and the patch has been sent to uport for inclusion >> in their next release. Also, the clock problem has been fixed. > > >Note: 2.2.2's release notes still list the 80287 bug as an open problem. > The clock fix and 80287 fix are quite new, were done in our lab and forwarded to Microport. They should be included in the next release. I will briefly describe them, but you will need a source licence to fix them yourself. In clock.c (rel.2.2/i*/i*/os) remove the first two #ifdef IBMAT, except to move time++ out of the second one into the regular code. This removes the kludges with which Microport tried to "fix" the problem. Also, set RTCCNT (/usr/include/sys/clock.h) to 19885 (decimal). In trap.c (same directory) add the following line outb (0xF0, 0); /* M001 - Clear busy condition */ after the asm (" fnclex") instruction (there is only one of them). Having done this, run make in that directory to get a new lib1, and then make a new kernal. After you have installed the new kernal, use /etc/patch to check .clocktic -- it should be 19885. If it is not, patch it. This value may need tuning if your system has slightly differnet internal oscillators. It was very nice to force a divide by zero and have the system dump core and return cleanly... The system is running well (no obscure compiler errors) with the 4 Meg Micron extended memory board at 10 MHz 1 Wait state. However, it did not run properly at 8 MHz 0 wait states. I wonder if other people with clones based on the Chips and Technology chip set have had such problems (mine is a Wells A*Star II). -- aryeh@eddie.mit.edu mit-eddie!lees-rif!aryeh