Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!seismo!rutgers!ames!amdahl!dlb!dana!rap From: rap@dana.UUCP (Rob Peck) Newsgroups: comp.sys.amiga Subject: Re: 14.31818 MHz 68010 Upgrade Message-ID: <204@dana.UUCP> Date: Thu, 6-Aug-87 12:39:56 EDT Article-I.D.: dana.204 Posted: Thu Aug 6 12:39:56 1987 Date-Received: Sat, 8-Aug-87 18:07:31 EDT References: <19965@ucbvax.BERKELEY.EDU> Distribution: na Organization: Dana Computer, Inc., Sunnyvale, CA Lines: 84 Summary: Still will get the same speed as before unless using non-CHIP RAM. In article <19965@ucbvax.BERKELEY.EDU>, robinson@renoir.Berkeley.EDU (Michael Robinson) writes: > I have located part numbers and suppliers for a circuit which will deliver > an exactly doubled, crystal controlled, syncronized clock signal to a > 16MHz 68010 sitting on a daughter board in the processor socket. > > This will, in theory, double (plus some) the processor speed of the > Amiga. To the rest of the system, this will mean the processor will be > making data requests every clock cycle, instead of every other. > > Before I initiate any mutilation, I would like to know what effects this will > have .... [devil's advocate mode on] FOR ACCESS TO CHIP MEMORY ------------------------- Unfortunately, there is a reason that the 68000 only grabs every alternate clock cycle to access the memory. That is to allow the other DMA, (that includes Video - one of Amiga's strong points) to access the RAM to create the display. The other DMA includes the sound, the sprites and the onboard RAM refresh that occurs during the first 8 clock cycles of the horizontal video scan line; these DMAs being spaced at each alternate clock position. Purchasers of the early docs for the Amiga got a chart that shows how DMA is distributed (that chart unfortunately got missed when the AW final versions of ROMK got printed). Bottom line is that during NON display times, your circuit might cause a speedup. This happens at the end of each display line time (a coupla percent) and during the vertical retrace time (about 62/263rds of the time). This advantage would be further cut if someone was running MOREROWS since more video time would be alloted and correspondingly less idle time. Video and other DMA automatically take precedence over the processor, so DTACK will be held off for your new speedup circuit until a processor grant could actually be made. Thus, it would indeed be ABLE to make a memory access each clock cycle, but it would end up waiting just as long as the original processor, effecting no speedup during times of heavy video DMA, (when accessing exclusively CHIP RAM). COMBINATION OF CHIP MEM AND NONCHIP MEM ACCESS ---------------------------------------------- For a 4 bit plane low resolution display, the video DMA still allows the normal 68000 to run full speed, leaving every alternate slot open for 68000 access. For a 2 bit plane high resolution display, it is the same situation. You WILL gain speed when: a) less than this number of low or high res bit planes is used (more memory time slots available for your higher speed processor) b) accessing external memory boards exclusively (or onboard ROM) (due to the split bus design of the Amiga, wherein the DMA access and the processor access to memory take place on separate busses and don't clash with each other). [ devil's advocate mode off ] When I create things for the Amiga, I am usually so embroiled in showing what the graphics or sound can do, I sometimes forget that it is a perfectly good general purpose computer with a well-designed multi-tasking exec built in, that works in ROM (or ROM equivalent, that is), or with whatever RAM is in the system, not necessarily all in CHIP mem. (Then too, I've lived with an exclusively CHIP mem machine for so long, no wonder I forget. In light of this, I must conclude this by saying that I LIKE YOUR IDEA, and encourage you to pursue it further; good luck; I want to try one when you've completed it. (CSA musta started this way, somehow). It may not give 2X+ performance, but it would certainly help depending on what kind of program was being run. I just wanted to point out some possible limitations. :-) :-) :-) Rob Peck ...ihnp4!hplabs!dana!rap DISCLAIMER: These opinions are mine, based on educated guesses and old documentation.