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From: hah@mipon3.intel.com (Hans Hansen)
Newsgroups: comp.sys.amiga
Subject: Re: 14.31818 MHz 68010 Upgrade
Message-ID: <942@omepd>
Date: Sat, 8-Aug-87 22:47:30 EDT
Article-I.D.: omepd.942
Posted: Sat Aug  8 22:47:30 1987
Date-Received: Sun, 9-Aug-87 22:07:34 EDT
References: <19965@ucbvax.BERKELEY.EDU> <204@dana.UUCP>
Sender: news@omepd
Reply-To: hah@mipon3.UUCP (Hans Hansen)
Distribution: world
Organization: Intel Corp., Hillsboro
Lines: 44

In article <204@dana.UUCP> rap@dana.UUCP (Rob Peck) writes:
>In article <19965@ucbvax.BERKELEY.EDU>, robinson@renoir.Berkeley.EDU (Michael Robinson) writes:
>> I have located part numbers and suppliers for a circuit which will deliver
>> an exactly doubled, crystal controlled, syncronized clock signal to a 
>> 16MHz 68010 sitting on a daughter board in the processor socket.
>> 
>
>[devil's advocate mode on]
>
>FOR ACCESS TO CHIP MEMORY
>-------------------------
>
>Unfortunately, there is a reason that the 68000 only grabs every alternate
>clock cycle to access the memory.  That is to allow the other DMA, 
>(that includes Video - one of Amiga's strong points) to access the RAM
>Rob Peck		...ihnp4!hplabs!dana!rap

[devil's, devil advocate mode on]

<But first ... Hi Rob>

The 14MHz 68010 idea is a real winner!  Why?

1)  I thought of it too!

2)  Not all 68K cycles are also memory cycles.  Therefore all multiple
processor cycles will be sped up.

*****  Problem  *****

The R/W access of a 68000/68010 running at 14MHz will not allow sufficient
address setup time for the DRAMs and the 8520s.  A 1 micro cycle delay is
needed during all reads and writes to the existing DRAM and 8520s.  I
proposed such a circuit to Bill Kolb in Dec 1984 or Jan 1985.  <It was
never followed up on due to the lack of 14.5MHz 68000/68010s at that time.>

Second problem:  The TrackDisk device will need to be tuned.

Third problem:  Copy protected programs will for the most part not load.


Hans

The kid with an idea a little ahead of its time.