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From: mjj@aplvax.UUCP (Marshall J. Jose)
Newsgroups: sci.electronics
Subject: Re: TTL Questions
Message-ID: <739@aplvax.UUCP>
Date: Thu, 20-Aug-87 13:13:08 EDT
Article-I.D.: aplvax.739
Posted: Thu Aug 20 13:13:08 1987
Date-Received: Sun, 23-Aug-87 22:24:14 EDT
References: <7105@alice.UUCP> <764@sol.ARPA> <128@umich.UUCP> <15370@onfcanim.UUCP>
Reply-To: mjj@aplvax.UUCP (Marshall J. Jose)
Organization: The Johns Hopkins University Applied Physics Laboratory
Lines: 12
Keywords: TTL, pullups

Actually, as I recall the various mfrs discussions & recommendations
regading pullups, the primary point was brought up that pullups
improve the overall circuit noise immunity, and that they are
ESPECIALLY recommended for LS gates.  The rationale here is that
plenty of garbage can frequently be found on the Vcc rails, which
might diddle a gate if its input was tied directly there.  Further-
more, due to the different design of LS gate inputs, they can sink a
whopping amount of current under certain overvoltage conditions.
Anyway, I'll go back & dig up my refs. on the subject so we can
settle this.
				Marshall Jose
				mjj@aplvax.jhuapl.edu