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From: nelson@ohlone.UUCP (Bron Nelson)
Newsgroups: comp.arch
Subject: Re: 80386 Multiply: quote from Intel
Message-ID: <357@ohlone.UUCP>
Date: Tue, 25-Aug-87 19:02:13 EDT
Article-I.D.: ohlone.357
Posted: Tue Aug 25 19:02:13 1987
Date-Received: Thu, 27-Aug-87 04:28:54 EDT
References: <576@obiwan.UUCP> <7939@sci.UUCP>
Organization: Cray Research Inc., Livermore, CA
Lines: 15
Summary: modified Booth algorithm

In article <7939@sci.UUCP>, ken@sci.UUCP (Ken Karakotsios) writes:
[...]
> called a "modified Booth algorithm", where two bits worth of a multiply can
[...]
> 	By the way, I think you can make this multiplication algorithm work for
> N bits per clock cycle, if you can provide all the following multiples of one
> of the inputs (call it Y) :  Y, 2Y,  ... (2^^N)Y .
> 
If'n I remember correctly, in fact you need to generate fairly nasty
values (like 3Y and 5Y) in order to get the 'N' bit modified Booth
algorithm to work.  This is why you don't typically see orders higher
than 2 bits.
-----------------------
Bron Nelson     {ihnp4, lll-lcc}!ohlone!nelson
Not the opinions of Cray Research