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From: mash@mips.UUCP
Newsgroups: comp.arch
Subject: Re: The 360 was a design landmark (really code density)
Message-ID: <631@winchester.UUCP>
Date: Thu, 27-Aug-87 02:55:15 EDT
Article-I.D.: winchest.631
Posted: Thu Aug 27 02:55:15 1987
Date-Received: Sat, 29-Aug-87 08:35:47 EDT
References: <855@tjalk.cs.vu.nl> <2683@hoptoad.uucp> <916@haddock.ISC.COM> <2596@ames.arpa> <18093@amdcad.AMD.COM>
Reply-To: mash@winchester.UUCP (John Mashey)
Organization: MIPS Computer Systems, Sunnyvale, CA
Lines: 21

In article <18093@amdcad.AMD.COM> tim@amdcad.AMD.COM (Tim Olson) writes:
>In article <2596@ames.arpa>, lamaster@pioneer.arpa (Hugh LaMaster) writes:
>+-----
>| In article <18088@amdcad.AMD.COM> tim@amdcad.UUCP (Tim Olson) writes:
>| 
>| >If the VAX instruction-set was designed for "maximum code density", they
>| >certainly did a poor job.  Many processors (including some "RISCs" --
>| >IBM ROMP and CRISP) can routinely beat it in code density.
>Whoops -- I may have spoken too strongly, here.

Note also that ROMP is a 16-register, multiple-instruction-size
architecture, whose design goals (low cost) forced them away from
caches, and thus towards a denser coding, and also towards lower
cost at the sacrifice of some speed.  The 32-bit-instruction RISCs
[IBM 801, HP Precision, MIPS, SPARC, etc] are usually less dense
than a VAX.
-- 
-john mashey	DISCLAIMER: <generic disclaimer, I speak for me only, etc>
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