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From: mjl@tropix.UUCP (Mike Lutz)
Newsgroups: comp.arch
Subject: Re: brash micros versus the Big Iron: not yet
Message-ID: <289@tropix.UUCP>
Date: Sat, 5-Sep-87 12:17:00 EDT
Article-I.D.: tropix.289
Posted: Sat Sep  5 12:17:00 1987
Date-Received: Sun, 6-Sep-87 06:13:53 EDT
References: <622@winchester.UUCP> <12953@amdahl.amdahl.com> <630@winchester.UUCP> <1202@pdn.UUCP> <8524@utzoo.UUCP> <495@telesoft.UUCP>
Reply-To: mjl@tropix.UUCP (Mike Lutz)
Organization: GCA/Tropel Div. Rochester, NY 14450
Lines: 17

In article <495@telesoft.UUCP> roger@telesoft.UUCP (Roger Arnold @prodigal) writes:
>> Many of the software people are among those clamoring for simplicity of
>> hardware design, mostly because the hardware designers have such a history
>> of getting things wrong when they try to be clever.
>
>Well, that's not entirely fair.  "Clever" hardware designs have
>generally worked out fine, for the particular language/environment
>that the designers were thinking about when they did the designs.  

In the first paragraph, I think clever is being used in the sense of "cute",
or "tricky", and I entirely agree that such cleverness is at the
heart of most CISC problems.  In the second paragraph, clever is used
in the sense of "ingenious", "skillful", or "resourceful".  This
second sense, which borders on "elegant", can be applied equally well
to special purpose hardware and to RISC designs.

Mike Lutz