Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!husc6!cmcl2!rutgers!ames!pioneer!lamaster From: lamaster@pioneer.arpa (Hugh LaMaster) Newsgroups: comp.arch Subject: Re: brash micros ... [really: CPI versus (cycles)/(work)] Message-ID: <2716@ames.arpa> Date: Wed, 9-Sep-87 12:56:15 EDT Article-I.D.: ames.2716 Posted: Wed Sep 9 12:56:15 1987 Date-Received: Fri, 11-Sep-87 02:12:51 EDT References: <622@winchester.UUCP> <12953@amdahl.amdahl.com> Sender: usenet@ames.arpa Reply-To: lamaster@ames.UUCP (Hugh LaMaster) Organization: NASA Ames Research Center, Moffett Field, Calif. Lines: 37 In article <667@winchester.UUCP> mash@winchester.UUCP (John Mashey) writes: >ones. CPI's DON'T EXIST APART FROM BENCHMARKS. For example, on the same >CPU: > 1.05 small loopy benchmark that fits in caches [Dhrystone] > 2-3 bigger one, with some FP, or cache misses, depending on > memory system [Hspice] > 30+ handcoded program that does mostly integer divides Exactly right. I only consider cycles per instruction to be useful when measured using the LINPACK benchmark myself :-) [Weitek, Fairchild, MIPS, and to a lesser extent Sun, Motorola, and AMD all seem to be taking floating point very seriously now. Thanks, folks.] Many people out there would no doubt prefer using a Un*x oriented benchmark with lots of typical utilities, fork and exec exercizers, TCP/IP/network &etc. stuff, rn ... It all depends upon the set of applications that you will run on the machine. The benchmarks used to measure the performance of the machine for your applications also can measure the "architectural efficiency" in various ways for your applications. IF you care. Presumably, an end user wouldn't care about it anyway, except out of curiosity, since the net performance is what the user sees, not the design tradeoffs of system architects. Hugh LaMaster, m/s 233-9, UUCP {seismo,topaz,lll-crg,ucbvax}! NASA Ames Research Center ames!pioneer!lamaster Moffett Field, CA 94035 ARPA lamaster@ames-pioneer.arpa Phone: (415)694-6117 ARPA lamaster@pioneer.arc.nasa.gov "IBM will have it soon" (Disclaimer: "All opinions solely the author's responsibility")